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@@ -243,6 +243,25 @@ static int fsl_elbc_run_command(struct mtd_info *mtd)
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return -EIO;
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}
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+ if (chip->ecc.mode != NAND_ECC_HW)
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+ return 0;
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+
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+ if (elbc_fcm_ctrl->read_bytes == mtd->writesize + mtd->oobsize) {
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+ uint32_t lteccr = in_be32(&lbc->lteccr);
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+ /*
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+ * if command was a full page read and the ELBC
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+ * has the LTECCR register, then bits 12-15 (ppc order) of
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+ * LTECCR indicates which 512 byte sub-pages had fixed errors.
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+ * bits 28-31 are uncorrectable errors, marked elsewhere.
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+ * for small page nand only 1 bit is used.
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+ * if the ELBC doesn't have the lteccr register it reads 0
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+ */
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+ if (lteccr & 0x000F000F)
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+ out_be32(&lbc->lteccr, 0x000F000F); /* clear lteccr */
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+ if (lteccr & 0x000F0000)
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+ mtd->ecc_stats.corrected++;
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+ }
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+
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return 0;
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}
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