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@@ -18,8 +18,8 @@ static void __cpuinit init_transmeta(struct cpuinfo_x86 *c)
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/* Print CMS and CPU revision */
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max = cpuid_eax(0x80860000);
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cpu_rev = 0;
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- if ( max >= 0x80860001 ) {
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- cpuid(0x80860001, &dummy, &cpu_rev, &cpu_freq, &cpu_flags);
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+ if (max >= 0x80860001) {
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+ cpuid(0x80860001, &dummy, &cpu_rev, &cpu_freq, &cpu_flags);
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if (cpu_rev != 0x02000000) {
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printk(KERN_INFO "CPU: Processor revision %u.%u.%u.%u, %u MHz\n",
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(cpu_rev >> 24) & 0xff,
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@@ -29,7 +29,7 @@ static void __cpuinit init_transmeta(struct cpuinfo_x86 *c)
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cpu_freq);
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}
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}
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- if ( max >= 0x80860002 ) {
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+ if (max >= 0x80860002) {
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cpuid(0x80860002, &new_cpu_rev, &cms_rev1, &cms_rev2, &dummy);
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if (cpu_rev == 0x02000000) {
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printk(KERN_INFO "CPU: Processor revision %08X, %u MHz\n",
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@@ -42,7 +42,7 @@ static void __cpuinit init_transmeta(struct cpuinfo_x86 *c)
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cms_rev1 & 0xff,
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cms_rev2);
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}
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- if ( max >= 0x80860006 ) {
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+ if (max >= 0x80860006) {
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cpuid(0x80860003,
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(void *)&cpu_info[0],
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(void *)&cpu_info[4],
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@@ -75,22 +75,24 @@ static void __cpuinit init_transmeta(struct cpuinfo_x86 *c)
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/* All Transmeta CPUs have a constant TSC */
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set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
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-
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+
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#ifdef CONFIG_SYSCTL
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- /* randomize_va_space slows us down enormously;
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- it probably triggers retranslation of x86->native bytecode */
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+ /*
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+ * randomize_va_space slows us down enormously;
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+ * it probably triggers retranslation of x86->native bytecode
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+ */
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randomize_va_space = 0;
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#endif
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}
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-static void __cpuinit transmeta_identify(struct cpuinfo_x86 * c)
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+static void __cpuinit transmeta_identify(struct cpuinfo_x86 *c)
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{
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u32 xlvl;
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/* Transmeta-defined flags: level 0x80860001 */
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xlvl = cpuid_eax(0x80860000);
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- if ( (xlvl & 0xffff0000) == 0x80860000 ) {
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- if ( xlvl >= 0x80860001 )
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+ if ((xlvl & 0xffff0000) == 0x80860000) {
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+ if (xlvl >= 0x80860001)
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c->x86_capability[2] = cpuid_edx(0x80860001);
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}
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}
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