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+/*
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+ * rtc-twl4030.c -- TWL4030 Real Time Clock interface
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+ *
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+ * Copyright (C) 2007 MontaVista Software, Inc
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+ * Author: Alexandre Rusev <source@mvista.com>
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+ *
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+ * Based on original TI driver twl4030-rtc.c
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+ * Copyright (C) 2006 Texas Instruments, Inc.
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+ *
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+ * Based on rtc-omap.c
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+ * Copyright (C) 2003 MontaVista Software, Inc.
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+ * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
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+ * Copyright (C) 2006 David Brownell
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License
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+ * as published by the Free Software Foundation; either version
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+ * 2 of the License, or (at your option) any later version.
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/module.h>
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+#include <linux/types.h>
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+#include <linux/rtc.h>
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+#include <linux/bcd.h>
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+#include <linux/platform_device.h>
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+#include <linux/interrupt.h>
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+
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+#include <linux/i2c/twl4030.h>
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+
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+
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+/*
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+ * RTC block register offsets (use TWL_MODULE_RTC)
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+ */
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+#define REG_SECONDS_REG 0x00
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+#define REG_MINUTES_REG 0x01
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+#define REG_HOURS_REG 0x02
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+#define REG_DAYS_REG 0x03
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+#define REG_MONTHS_REG 0x04
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+#define REG_YEARS_REG 0x05
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+#define REG_WEEKS_REG 0x06
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+
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+#define REG_ALARM_SECONDS_REG 0x07
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+#define REG_ALARM_MINUTES_REG 0x08
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+#define REG_ALARM_HOURS_REG 0x09
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+#define REG_ALARM_DAYS_REG 0x0A
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+#define REG_ALARM_MONTHS_REG 0x0B
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+#define REG_ALARM_YEARS_REG 0x0C
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+
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+#define REG_RTC_CTRL_REG 0x0D
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+#define REG_RTC_STATUS_REG 0x0E
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+#define REG_RTC_INTERRUPTS_REG 0x0F
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+
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+#define REG_RTC_COMP_LSB_REG 0x10
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+#define REG_RTC_COMP_MSB_REG 0x11
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+
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+/* RTC_CTRL_REG bitfields */
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+#define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01
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+#define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02
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+#define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04
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+#define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08
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+#define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10
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+#define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20
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+#define BIT_RTC_CTRL_REG_GET_TIME_M 0x40
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+
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+/* RTC_STATUS_REG bitfields */
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+#define BIT_RTC_STATUS_REG_RUN_M 0x02
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+#define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04
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+#define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08
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+#define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10
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+#define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20
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+#define BIT_RTC_STATUS_REG_ALARM_M 0x40
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+#define BIT_RTC_STATUS_REG_POWER_UP_M 0x80
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+
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+/* RTC_INTERRUPTS_REG bitfields */
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+#define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03
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+#define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04
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+#define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08
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+
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+
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+/* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
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+#define ALL_TIME_REGS 6
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+
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+/*----------------------------------------------------------------------*/
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+
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+/*
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+ * Supports 1 byte read from TWL4030 RTC register.
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+ */
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+static int twl4030_rtc_read_u8(u8 *data, u8 reg)
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+{
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+ int ret;
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+
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+ ret = twl4030_i2c_read_u8(TWL4030_MODULE_RTC, data, reg);
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+ if (ret < 0)
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+ pr_err("twl4030_rtc: Could not read TWL4030"
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+ "register %X - error %d\n", reg, ret);
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+ return ret;
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+}
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+
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+/*
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+ * Supports 1 byte write to TWL4030 RTC registers.
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+ */
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+static int twl4030_rtc_write_u8(u8 data, u8 reg)
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+{
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+ int ret;
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+
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+ ret = twl4030_i2c_write_u8(TWL4030_MODULE_RTC, data, reg);
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+ if (ret < 0)
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+ pr_err("twl4030_rtc: Could not write TWL4030"
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+ "register %X - error %d\n", reg, ret);
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+ return ret;
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+}
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+
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+/*
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+ * Cache the value for timer/alarm interrupts register; this is
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+ * only changed by callers holding rtc ops lock (or resume).
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+ */
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+static unsigned char rtc_irq_bits;
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+
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+/*
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+ * Enable timer and/or alarm interrupts.
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+ */
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+static int set_rtc_irq_bit(unsigned char bit)
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+{
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+ unsigned char val;
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+ int ret;
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+
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+ val = rtc_irq_bits | bit;
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+ ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
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+ if (ret == 0)
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+ rtc_irq_bits = val;
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+
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+ return ret;
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+}
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+
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+/*
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+ * Disable timer and/or alarm interrupts.
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+ */
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+static int mask_rtc_irq_bit(unsigned char bit)
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+{
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+ unsigned char val;
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+ int ret;
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+
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+ val = rtc_irq_bits & ~bit;
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+ ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
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+ if (ret == 0)
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+ rtc_irq_bits = val;
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+
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+ return ret;
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+}
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+
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+static inline int twl4030_rtc_alarm_irq_set_state(int enabled)
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+{
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+ int ret;
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+
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+ if (enabled)
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+ ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
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+ else
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+ ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
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+
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+ return ret;
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+}
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+
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+static inline int twl4030_rtc_irq_set_state(int enabled)
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+{
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+ int ret;
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+
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+ if (enabled)
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+ ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
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+ else
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+ ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
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+
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+ return ret;
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+}
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+
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+/*
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+ * Gets current TWL4030 RTC time and date parameters.
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+ *
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+ * The RTC's time/alarm representation is not what gmtime(3) requires
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+ * Linux to use:
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+ *
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+ * - Months are 1..12 vs Linux 0-11
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+ * - Years are 0..99 vs Linux 1900..N (we assume 21st century)
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+ */
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+static int twl4030_rtc_read_time(struct device *dev, struct rtc_time *tm)
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+{
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+ unsigned char rtc_data[ALL_TIME_REGS + 1];
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+ int ret;
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+ u8 save_control;
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+
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+ ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
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+ if (ret < 0)
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+ return ret;
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+
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+ save_control |= BIT_RTC_CTRL_REG_GET_TIME_M;
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+
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+ ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
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+ if (ret < 0)
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+ return ret;
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+
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+ ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
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+ REG_SECONDS_REG, ALL_TIME_REGS);
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+
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+ if (ret < 0) {
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+ dev_err(dev, "rtc_read_time error %d\n", ret);
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+ return ret;
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+ }
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+
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+ tm->tm_sec = bcd2bin(rtc_data[0]);
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+ tm->tm_min = bcd2bin(rtc_data[1]);
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+ tm->tm_hour = bcd2bin(rtc_data[2]);
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+ tm->tm_mday = bcd2bin(rtc_data[3]);
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+ tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
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+ tm->tm_year = bcd2bin(rtc_data[5]) + 100;
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+
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+ return ret;
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+}
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+
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+static int twl4030_rtc_set_time(struct device *dev, struct rtc_time *tm)
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+{
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+ unsigned char save_control;
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+ unsigned char rtc_data[ALL_TIME_REGS + 1];
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+ int ret;
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+
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+ rtc_data[1] = bin2bcd(tm->tm_sec);
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+ rtc_data[2] = bin2bcd(tm->tm_min);
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+ rtc_data[3] = bin2bcd(tm->tm_hour);
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+ rtc_data[4] = bin2bcd(tm->tm_mday);
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+ rtc_data[5] = bin2bcd(tm->tm_mon + 1);
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+ rtc_data[6] = bin2bcd(tm->tm_year - 100);
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+
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+ /* Stop RTC while updating the TC registers */
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+ ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
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+ if (ret < 0)
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+ goto out;
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+
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+ save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
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+ twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
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+ if (ret < 0)
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+ goto out;
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+
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+ /* update all the time registers in one shot */
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+ ret = twl4030_i2c_write(TWL4030_MODULE_RTC, rtc_data,
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+ REG_SECONDS_REG, ALL_TIME_REGS);
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+ if (ret < 0) {
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+ dev_err(dev, "rtc_set_time error %d\n", ret);
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+ goto out;
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+ }
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+
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+ /* Start back RTC */
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+ save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M;
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+ ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
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+
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+out:
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+ return ret;
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+}
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+
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+/*
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+ * Gets current TWL4030 RTC alarm time.
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+ */
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+static int twl4030_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
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+{
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+ unsigned char rtc_data[ALL_TIME_REGS + 1];
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+ int ret;
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+
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+ ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
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+ REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
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+ if (ret < 0) {
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+ dev_err(dev, "rtc_read_alarm error %d\n", ret);
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+ return ret;
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+ }
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+
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+ /* some of these fields may be wildcard/"match all" */
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+ alm->time.tm_sec = bcd2bin(rtc_data[0]);
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+ alm->time.tm_min = bcd2bin(rtc_data[1]);
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+ alm->time.tm_hour = bcd2bin(rtc_data[2]);
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+ alm->time.tm_mday = bcd2bin(rtc_data[3]);
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+ alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
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+ alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;
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+
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+ /* report cached alarm enable state */
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+ if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
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+ alm->enabled = 1;
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+
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+ return ret;
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+}
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+
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+static int twl4030_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
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+{
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+ unsigned char alarm_data[ALL_TIME_REGS + 1];
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+ int ret;
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+
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+ ret = twl4030_rtc_alarm_irq_set_state(0);
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+ if (ret)
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+ goto out;
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+
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+ alarm_data[1] = bin2bcd(alm->time.tm_sec);
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+ alarm_data[2] = bin2bcd(alm->time.tm_min);
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+ alarm_data[3] = bin2bcd(alm->time.tm_hour);
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+ alarm_data[4] = bin2bcd(alm->time.tm_mday);
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+ alarm_data[5] = bin2bcd(alm->time.tm_mon + 1);
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+ alarm_data[6] = bin2bcd(alm->time.tm_year - 100);
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+
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+ /* update all the alarm registers in one shot */
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+ ret = twl4030_i2c_write(TWL4030_MODULE_RTC, alarm_data,
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+ REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
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+ if (ret) {
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+ dev_err(dev, "rtc_set_alarm error %d\n", ret);
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+ goto out;
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+ }
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+
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+ if (alm->enabled)
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+ ret = twl4030_rtc_alarm_irq_set_state(1);
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+out:
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+ return ret;
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+}
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+
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+#ifdef CONFIG_RTC_INTF_DEV
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+
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+static int twl4030_rtc_ioctl(struct device *dev, unsigned int cmd,
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+ unsigned long arg)
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+{
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+ switch (cmd) {
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+ case RTC_AIE_OFF:
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+ return twl4030_rtc_alarm_irq_set_state(0);
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+ case RTC_AIE_ON:
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+ return twl4030_rtc_alarm_irq_set_state(1);
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+ case RTC_UIE_OFF:
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+ return twl4030_rtc_irq_set_state(0);
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+ case RTC_UIE_ON:
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+ return twl4030_rtc_irq_set_state(1);
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+
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+ default:
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+ return -ENOIOCTLCMD;
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+ }
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+}
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+
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+#else
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+#define omap_rtc_ioctl NULL
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+#endif
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+
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+static irqreturn_t twl4030_rtc_interrupt(int irq, void *rtc)
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+{
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+ unsigned long events = 0;
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+ int ret = IRQ_NONE;
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+ int res;
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+ u8 rd_reg;
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+
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+#ifdef CONFIG_LOCKDEP
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+ /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which
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+ * we don't want and can't tolerate. Although it might be
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+ * friendlier not to borrow this thread context...
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+ */
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+ local_irq_enable();
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+#endif
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+
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+ res = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
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+ if (res)
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+ goto out;
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+ /*
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+ * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
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+ * only one (ALARM or RTC) interrupt source may be enabled
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+ * at time, we also could check our results
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+ * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
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+ */
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+ if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
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+ events |= RTC_IRQF | RTC_AF;
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+ else
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+ events |= RTC_IRQF | RTC_UF;
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+
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+ res = twl4030_rtc_write_u8(rd_reg | BIT_RTC_STATUS_REG_ALARM_M,
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+ REG_RTC_STATUS_REG);
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+ if (res)
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+ goto out;
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+
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+ /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
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+ * needs 2 reads to clear the interrupt. One read is done in
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+ * do_twl4030_pwrirq(). Doing the second read, to clear
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+ * the bit.
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+ *
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+ * FIXME the reason PWR_ISR1 needs an extra read is that
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+ * RTC_IF retriggered until we cleared REG_ALARM_M above.
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+ * But re-reading like this is a bad hack; by doing so we
|
|
|
+ * risk wrongly clearing status for some other IRQ (losing
|
|
|
+ * the interrupt). Be smarter about handling RTC_UF ...
|
|
|
+ */
|
|
|
+ res = twl4030_i2c_read_u8(TWL4030_MODULE_INT,
|
|
|
+ &rd_reg, TWL4030_INT_PWR_ISR1);
|
|
|
+ if (res)
|
|
|
+ goto out;
|
|
|
+
|
|
|
+ /* Notify RTC core on event */
|
|
|
+ rtc_update_irq(rtc, 1, events);
|
|
|
+
|
|
|
+ ret = IRQ_HANDLED;
|
|
|
+out:
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static struct rtc_class_ops twl4030_rtc_ops = {
|
|
|
+ .ioctl = twl4030_rtc_ioctl,
|
|
|
+ .read_time = twl4030_rtc_read_time,
|
|
|
+ .set_time = twl4030_rtc_set_time,
|
|
|
+ .read_alarm = twl4030_rtc_read_alarm,
|
|
|
+ .set_alarm = twl4030_rtc_set_alarm,
|
|
|
+};
|
|
|
+
|
|
|
+/*----------------------------------------------------------------------*/
|
|
|
+
|
|
|
+static int __devinit twl4030_rtc_probe(struct platform_device *pdev)
|
|
|
+{
|
|
|
+ struct rtc_device *rtc;
|
|
|
+ int ret = 0;
|
|
|
+ int irq = platform_get_irq(pdev, 0);
|
|
|
+ u8 rd_reg;
|
|
|
+
|
|
|
+ if (irq < 0)
|
|
|
+ return irq;
|
|
|
+
|
|
|
+ rtc = rtc_device_register(pdev->name,
|
|
|
+ &pdev->dev, &twl4030_rtc_ops, THIS_MODULE);
|
|
|
+ if (IS_ERR(rtc)) {
|
|
|
+ ret = -EINVAL;
|
|
|
+ dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
|
|
|
+ PTR_ERR(rtc));
|
|
|
+ goto out0;
|
|
|
+
|
|
|
+ }
|
|
|
+
|
|
|
+ platform_set_drvdata(pdev, rtc);
|
|
|
+
|
|
|
+ ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
|
|
|
+
|
|
|
+ if (ret < 0)
|
|
|
+ goto out1;
|
|
|
+
|
|
|
+ if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
|
|
|
+ dev_warn(&pdev->dev, "Power up reset detected.\n");
|
|
|
+
|
|
|
+ if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
|
|
|
+ dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");
|
|
|
+
|
|
|
+ /* Clear RTC Power up reset and pending alarm interrupts */
|
|
|
+ ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
|
|
|
+ if (ret < 0)
|
|
|
+ goto out1;
|
|
|
+
|
|
|
+ ret = request_irq(irq, twl4030_rtc_interrupt,
|
|
|
+ IRQF_TRIGGER_RISING,
|
|
|
+ rtc->dev.bus_id, rtc);
|
|
|
+ if (ret < 0) {
|
|
|
+ dev_err(&pdev->dev, "IRQ is not free.\n");
|
|
|
+ goto out1;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Check RTC module status, Enable if it is off */
|
|
|
+ ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG);
|
|
|
+ if (ret < 0)
|
|
|
+ goto out2;
|
|
|
+
|
|
|
+ if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) {
|
|
|
+ dev_info(&pdev->dev, "Enabling TWL4030-RTC.\n");
|
|
|
+ rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M;
|
|
|
+ ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG);
|
|
|
+ if (ret < 0)
|
|
|
+ goto out2;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* init cached IRQ enable bits */
|
|
|
+ ret = twl4030_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG);
|
|
|
+ if (ret < 0)
|
|
|
+ goto out2;
|
|
|
+
|
|
|
+ return ret;
|
|
|
+
|
|
|
+
|
|
|
+out2:
|
|
|
+ free_irq(irq, rtc);
|
|
|
+out1:
|
|
|
+ rtc_device_unregister(rtc);
|
|
|
+out0:
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * Disable all TWL4030 RTC module interrupts.
|
|
|
+ * Sets status flag to free.
|
|
|
+ */
|
|
|
+static int __devexit twl4030_rtc_remove(struct platform_device *pdev)
|
|
|
+{
|
|
|
+ /* leave rtc running, but disable irqs */
|
|
|
+ struct rtc_device *rtc = platform_get_drvdata(pdev);
|
|
|
+ int irq = platform_get_irq(pdev, 0);
|
|
|
+
|
|
|
+ mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
|
|
|
+ mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
|
|
|
+
|
|
|
+ free_irq(irq, rtc);
|
|
|
+
|
|
|
+ rtc_device_unregister(rtc);
|
|
|
+ platform_set_drvdata(pdev, NULL);
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static void twl4030_rtc_shutdown(struct platform_device *pdev)
|
|
|
+{
|
|
|
+ mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M |
|
|
|
+ BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
|
|
|
+}
|
|
|
+
|
|
|
+#ifdef CONFIG_PM
|
|
|
+
|
|
|
+static unsigned char irqstat;
|
|
|
+
|
|
|
+static int twl4030_rtc_suspend(struct platform_device *pdev, pm_message_t state)
|
|
|
+{
|
|
|
+ irqstat = rtc_irq_bits;
|
|
|
+
|
|
|
+ /* REVISIT alarm may need to wake us from sleep */
|
|
|
+ mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M |
|
|
|
+ BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int twl4030_rtc_resume(struct platform_device *pdev)
|
|
|
+{
|
|
|
+ set_rtc_irq_bit(irqstat);
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+#else
|
|
|
+#define twl4030_rtc_suspend NULL
|
|
|
+#define twl4030_rtc_resume NULL
|
|
|
+#endif
|
|
|
+
|
|
|
+MODULE_ALIAS("platform:twl4030_rtc");
|
|
|
+
|
|
|
+static struct platform_driver twl4030rtc_driver = {
|
|
|
+ .probe = twl4030_rtc_probe,
|
|
|
+ .remove = __devexit_p(twl4030_rtc_remove),
|
|
|
+ .shutdown = twl4030_rtc_shutdown,
|
|
|
+ .suspend = twl4030_rtc_suspend,
|
|
|
+ .resume = twl4030_rtc_resume,
|
|
|
+ .driver = {
|
|
|
+ .owner = THIS_MODULE,
|
|
|
+ .name = "twl4030_rtc",
|
|
|
+ },
|
|
|
+};
|
|
|
+
|
|
|
+static int __init twl4030_rtc_init(void)
|
|
|
+{
|
|
|
+ return platform_driver_register(&twl4030rtc_driver);
|
|
|
+}
|
|
|
+module_init(twl4030_rtc_init);
|
|
|
+
|
|
|
+static void __exit twl4030_rtc_exit(void)
|
|
|
+{
|
|
|
+ platform_driver_unregister(&twl4030rtc_driver);
|
|
|
+}
|
|
|
+module_exit(twl4030_rtc_exit);
|
|
|
+
|
|
|
+MODULE_AUTHOR("Texas Instruments, MontaVista Software");
|
|
|
+MODULE_LICENSE("GPL");
|