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@@ -91,7 +91,11 @@ ENTRY(v7_flush_kern_cache_all)
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THUMB( stmfd sp!, {r4-r7, r9-r11, lr} )
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bl v7_flush_dcache_all
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mov r0, #0
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+#ifdef CONFIG_SMP
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+ mcr p15, 0, r0, c7, c1, 0 @ invalidate I-cache inner shareable
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+#else
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mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
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+#endif
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ARM( ldmfd sp!, {r4-r5, r7, r9-r11, lr} )
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THUMB( ldmfd sp!, {r4-r7, r9-r11, lr} )
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mov pc, lr
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