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@@ -56,8 +56,8 @@
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#define DRV_MODULE_NAME "bnx2"
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#define PFX DRV_MODULE_NAME ": "
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-#define DRV_MODULE_VERSION "1.4.44"
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-#define DRV_MODULE_RELDATE "August 10, 2006"
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+#define DRV_MODULE_VERSION "1.4.45"
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+#define DRV_MODULE_RELDATE "September 29, 2006"
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#define RUN_AT(x) (jiffies + (x))
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@@ -5805,6 +5805,34 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
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bp->cmd_ticks_int = bp->cmd_ticks;
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}
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+ /* Disable MSI on 5706 if AMD 8132 bridge is found.
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+ *
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+ * MSI is defined to be 32-bit write. The 5706 does 64-bit MSI writes
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+ * with byte enables disabled on the unused 32-bit word. This is legal
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+ * but causes problems on the AMD 8132 which will eventually stop
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+ * responding after a while.
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+ *
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+ * AMD believes this incompatibility is unique to the 5706, and
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+ * prefers to locally disable MSI rather than globally disabling it
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+ * using pci_msi_quirk.
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+ */
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+ if (CHIP_NUM(bp) == CHIP_NUM_5706 && disable_msi == 0) {
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+ struct pci_dev *amd_8132 = NULL;
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+
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+ while ((amd_8132 = pci_get_device(PCI_VENDOR_ID_AMD,
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+ PCI_DEVICE_ID_AMD_8132_BRIDGE,
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+ amd_8132))) {
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+ u8 rev;
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+
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+ pci_read_config_byte(amd_8132, PCI_REVISION_ID, &rev);
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+ if (rev >= 0x10 && rev <= 0x13) {
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+ disable_msi = 1;
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+ pci_dev_put(amd_8132);
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+ break;
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+ }
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+ }
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+ }
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+
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bp->autoneg = AUTONEG_SPEED | AUTONEG_FLOW_CTRL;
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bp->req_line_speed = 0;
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if (bp->phy_flags & PHY_SERDES_FLAG) {
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