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@@ -142,6 +142,7 @@
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#define VGA_MSR_CGA_MODE (1<<0)
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#define VGA_SR_INDEX 0x3c4
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+#define SR01 1
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#define VGA_SR_DATA 0x3c5
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#define VGA_AR_INDEX 0x3c0
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@@ -938,23 +939,6 @@
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#define DPLL_LOCK_VLV (1<<15)
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#define DPLL_INTEGRATED_CLOCK_VLV (1<<13)
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-#define SRX_INDEX 0x3c4
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-#define SRX_DATA 0x3c5
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-#define SR01 1
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-#define SR01_SCREEN_OFF (1<<5)
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-
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-#define PPCR 0x61204
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-#define PPCR_ON (1<<0)
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-
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-#define DVOB 0x61140
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-#define DVOB_ON (1<<31)
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-#define DVOC 0x61160
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-#define DVOC_ON (1<<31)
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-#define LVDS 0x61180
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-#define LVDS_ON (1<<31)
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-
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-/* Scratch pad debug 0 reg:
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- */
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#define DPLL_FPA01_P1_POST_DIV_MASK_I830 0x001f0000
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/*
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* The i830 generation, in LVDS mode, defines P1 as the bit number set within
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