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@@ -231,7 +231,7 @@ static int quirk_pcie_aspm_write(struct pci_bus *bus, unsigned int devfn, int wh
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offset = quirk_aspm_offset[GET_INDEX(bus->self->device, devfn)];
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if ((offset) && (where == offset))
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- value = value & 0xfffffffc;
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+ value = value & ~PCI_EXP_LNKCTL_ASPMC;
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return raw_pci_write(pci_domain_nr(bus), bus->number,
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devfn, where, size, value);
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@@ -252,7 +252,7 @@ static struct pci_ops quirk_pcie_aspm_ops = {
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*/
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static void pcie_rootport_aspm_quirk(struct pci_dev *pdev)
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{
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- int cap_base, i;
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+ int i;
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struct pci_bus *pbus;
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struct pci_dev *dev;
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@@ -278,7 +278,7 @@ static void pcie_rootport_aspm_quirk(struct pci_dev *pdev)
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for (i = GET_INDEX(pdev->device, 0); i <= GET_INDEX(pdev->device, 7); ++i)
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quirk_aspm_offset[i] = 0;
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- pbus->ops = pbus->parent->ops;
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+ pci_bus_set_ops(pbus, pbus->parent->ops);
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} else {
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/*
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* If devices are attached to the root port at power-up or
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@@ -286,13 +286,15 @@ static void pcie_rootport_aspm_quirk(struct pci_dev *pdev)
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* each root port to save the register offsets and replace the
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* bus ops.
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*/
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- list_for_each_entry(dev, &pbus->devices, bus_list) {
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+ list_for_each_entry(dev, &pbus->devices, bus_list)
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/* There are 0 to 8 devices attached to this bus */
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- cap_base = pci_find_capability(dev, PCI_CAP_ID_EXP);
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- quirk_aspm_offset[GET_INDEX(pdev->device, dev->devfn)] = cap_base + 0x10;
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- }
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- pbus->ops = &quirk_pcie_aspm_ops;
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+ quirk_aspm_offset[GET_INDEX(pdev->device, dev->devfn)] =
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+ dev->pcie_cap + PCI_EXP_LNKCTL;
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+
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+ pci_bus_set_ops(pbus, &quirk_pcie_aspm_ops);
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+ dev_info(&pbus->dev, "writes to ASPM control bits will be ignored\n");
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}
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+
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MCH_PA, pcie_rootport_aspm_quirk);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MCH_PA1, pcie_rootport_aspm_quirk);
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