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@@ -2,6 +2,8 @@
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* Exceptions for specific devices. Usually work-arounds for fatal design flaws.
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*/
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+#include <linux/delay.h>
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+#include <linux/dmi.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include "pci.h"
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@@ -384,3 +386,60 @@ static void __devinit pci_fixup_video(struct pci_dev *pdev)
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}
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video);
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+
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+/*
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+ * Some Toshiba laptops need extra code to enable their TI TSB43AB22/A.
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+ *
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+ * We pretend to bring them out of full D3 state, and restore the proper
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+ * IRQ, PCI cache line size, and BARs, otherwise the device won't function
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+ * properly. In some cases, the device will generate an interrupt on
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+ * the wrong IRQ line, causing any devices sharing the the line it's
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+ * *supposed* to use to be disabled by the kernel's IRQ debug code.
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+ */
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+static u16 toshiba_line_size;
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+
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+static struct dmi_system_id __devinit toshiba_ohci1394_dmi_table[] = {
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+ {
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+ .ident = "Toshiba PS5 based laptop",
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+ .matches = {
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+ DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
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+ DMI_MATCH(DMI_PRODUCT_VERSION, "PS5"),
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+ },
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+ },
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+ {
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+ .ident = "Toshiba PSM4 based laptop",
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+ .matches = {
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+ DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
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+ DMI_MATCH(DMI_PRODUCT_VERSION, "PSM4"),
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+ },
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+ },
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+ { }
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+};
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+
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+static void __devinit pci_pre_fixup_toshiba_ohci1394(struct pci_dev *dev)
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+{
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+ if (!dmi_check_system(toshiba_ohci1394_dmi_table))
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+ return; /* only applies to certain Toshibas (so far) */
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+
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+ dev->current_state = PCI_D3cold;
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+ pci_read_config_word(dev, PCI_CACHE_LINE_SIZE, &toshiba_line_size);
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+}
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+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, 0x8032,
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+ pci_pre_fixup_toshiba_ohci1394);
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+
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+static void __devinit pci_post_fixup_toshiba_ohci1394(struct pci_dev *dev)
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+{
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+ if (!dmi_check_system(toshiba_ohci1394_dmi_table))
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+ return; /* only applies to certain Toshibas (so far) */
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+
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+ /* Restore config space on Toshiba laptops */
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+ mdelay(10);
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+ pci_write_config_word(dev, PCI_CACHE_LINE_SIZE, toshiba_line_size);
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+ pci_write_config_word(dev, PCI_INTERRUPT_LINE, dev->irq);
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+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,
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+ pci_resource_start(dev, 0));
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+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_1,
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+ pci_resource_start(dev, 1));
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+}
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+DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_TI, 0x8032,
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+ pci_post_fixup_toshiba_ohci1394);
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