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@@ -141,6 +141,9 @@ struct cppi41_dd {
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const struct chan_queues *queues_rx;
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const struct chan_queues *queues_tx;
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struct chan_queues td_queue;
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+
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+ /* context for suspend/resume */
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+ unsigned int dma_tdfdq;
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};
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#define FIST_COMPLETION_QUEUE 93
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@@ -1050,6 +1053,7 @@ static int cppi41_suspend(struct device *dev)
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{
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struct cppi41_dd *cdd = dev_get_drvdata(dev);
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+ cdd->dma_tdfdq = cppi_readl(cdd->ctrl_mem + DMA_TDFDQ);
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cppi_writel(0, cdd->usbss_mem + USBSS_IRQ_CLEARR);
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disable_sched(cdd);
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@@ -1059,12 +1063,23 @@ static int cppi41_suspend(struct device *dev)
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static int cppi41_resume(struct device *dev)
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{
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struct cppi41_dd *cdd = dev_get_drvdata(dev);
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+ struct cppi41_channel *c;
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int i;
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for (i = 0; i < DESCS_AREAS; i++)
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cppi_writel(cdd->descs_phys, cdd->qmgr_mem + QMGR_MEMBASE(i));
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+ list_for_each_entry(c, &cdd->ddev.channels, chan.device_node)
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+ if (!c->is_tx)
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+ cppi_writel(c->q_num, c->gcr_reg + RXHPCRA0);
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+
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init_sched(cdd);
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+
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+ cppi_writel(cdd->dma_tdfdq, cdd->ctrl_mem + DMA_TDFDQ);
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+ cppi_writel(cdd->scratch_phys, cdd->qmgr_mem + QMGR_LRAM0_BASE);
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+ cppi_writel(QMGR_SCRATCH_SIZE, cdd->qmgr_mem + QMGR_LRAM_SIZE);
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+ cppi_writel(0, cdd->qmgr_mem + QMGR_LRAM1_BASE);
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+
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cppi_writel(USBSS_IRQ_PD_COMP, cdd->usbss_mem + USBSS_IRQ_ENABLER);
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return 0;
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