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@@ -278,7 +278,7 @@ static unsigned tegra_slink_calculate_curr_xfer_param(
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{
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unsigned remain_len = t->len - tspi->cur_pos;
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unsigned max_word;
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- unsigned bits_per_word ;
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+ unsigned bits_per_word;
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unsigned max_len;
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unsigned total_fifo_words;
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@@ -707,8 +707,7 @@ static void tegra_slink_deinit_dma_param(struct tegra_slink_data *tspi,
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}
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static int tegra_slink_start_transfer_one(struct spi_device *spi,
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- struct spi_transfer *t, bool is_first_of_msg,
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- bool is_single_xfer)
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+ struct spi_transfer *t)
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{
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struct tegra_slink_data *tspi = spi_master_get_devdata(spi->master);
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u32 speed;
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@@ -732,32 +731,12 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi,
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tspi->curr_xfer = t;
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total_fifo_words = tegra_slink_calculate_curr_xfer_param(spi, tspi, t);
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- if (is_first_of_msg) {
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- tegra_slink_clear_status(tspi);
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+ command = tspi->command_reg;
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+ command &= ~SLINK_BIT_LENGTH(~0);
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+ command |= SLINK_BIT_LENGTH(bits_per_word - 1);
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- command = tspi->def_command_reg;
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- command |= SLINK_BIT_LENGTH(bits_per_word - 1);
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- command |= SLINK_CS_SW | SLINK_CS_VALUE;
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-
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- command2 = tspi->def_command2_reg;
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- command2 |= SLINK_SS_EN_CS(spi->chip_select);
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-
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- command &= ~SLINK_MODES;
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- if (spi->mode & SPI_CPHA)
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- command |= SLINK_CK_SDA;
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-
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- if (spi->mode & SPI_CPOL)
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- command |= SLINK_IDLE_SCLK_DRIVE_HIGH;
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- else
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- command |= SLINK_IDLE_SCLK_DRIVE_LOW;
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- } else {
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- command = tspi->command_reg;
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- command &= ~SLINK_BIT_LENGTH(~0);
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- command |= SLINK_BIT_LENGTH(bits_per_word - 1);
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-
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- command2 = tspi->command2_reg;
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- command2 &= ~(SLINK_RXEN | SLINK_TXEN);
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- }
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+ command2 = tspi->command2_reg;
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+ command2 &= ~(SLINK_RXEN | SLINK_TXEN);
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tegra_slink_writel(tspi, command, SLINK_COMMAND);
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tspi->command_reg = command;
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@@ -824,58 +803,72 @@ static int tegra_slink_setup(struct spi_device *spi)
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return 0;
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}
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-static int tegra_slink_transfer_one_message(struct spi_master *master,
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- struct spi_message *msg)
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+static int tegra_slink_prepare_message(struct spi_master *master,
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+ struct spi_message *msg)
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{
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- bool is_first_msg = true;
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- int single_xfer;
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struct tegra_slink_data *tspi = spi_master_get_devdata(master);
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- struct spi_transfer *xfer;
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struct spi_device *spi = msg->spi;
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- int ret;
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- msg->status = 0;
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- msg->actual_length = 0;
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+ tegra_slink_clear_status(tspi);
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- single_xfer = list_is_singular(&msg->transfers);
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- list_for_each_entry(xfer, &msg->transfers, transfer_list) {
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- INIT_COMPLETION(tspi->xfer_completion);
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- ret = tegra_slink_start_transfer_one(spi, xfer,
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- is_first_msg, single_xfer);
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- if (ret < 0) {
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- dev_err(tspi->dev,
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- "spi can not start transfer, err %d\n", ret);
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- goto exit;
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- }
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- is_first_msg = false;
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- ret = wait_for_completion_timeout(&tspi->xfer_completion,
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- SLINK_DMA_TIMEOUT);
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- if (WARN_ON(ret == 0)) {
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- dev_err(tspi->dev,
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- "spi trasfer timeout, err %d\n", ret);
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- ret = -EIO;
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- goto exit;
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- }
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+ tspi->command_reg = tspi->def_command_reg;
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+ tspi->command_reg |= SLINK_CS_SW | SLINK_CS_VALUE;
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- if (tspi->tx_status || tspi->rx_status) {
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- dev_err(tspi->dev, "Error in Transfer\n");
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- ret = -EIO;
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- goto exit;
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- }
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- msg->actual_length += xfer->len;
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- if (xfer->cs_change && xfer->delay_usecs) {
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- tegra_slink_writel(tspi, tspi->def_command_reg,
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- SLINK_COMMAND);
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- udelay(xfer->delay_usecs);
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- }
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+ tspi->command2_reg = tspi->def_command2_reg;
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+ tspi->command2_reg |= SLINK_SS_EN_CS(spi->chip_select);
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+
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+ tspi->command_reg &= ~SLINK_MODES;
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+ if (spi->mode & SPI_CPHA)
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+ tspi->command_reg |= SLINK_CK_SDA;
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+
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+ if (spi->mode & SPI_CPOL)
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+ tspi->command_reg |= SLINK_IDLE_SCLK_DRIVE_HIGH;
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+ else
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+ tspi->command_reg |= SLINK_IDLE_SCLK_DRIVE_LOW;
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+
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+ return 0;
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+}
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+
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+static int tegra_slink_transfer_one(struct spi_master *master,
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+ struct spi_device *spi,
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+ struct spi_transfer *xfer)
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+{
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+ struct tegra_slink_data *tspi = spi_master_get_devdata(master);
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+ int ret;
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+
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+ INIT_COMPLETION(tspi->xfer_completion);
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+ ret = tegra_slink_start_transfer_one(spi, xfer);
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+ if (ret < 0) {
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+ dev_err(tspi->dev,
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+ "spi can not start transfer, err %d\n", ret);
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+ return ret;
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}
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- ret = 0;
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-exit:
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+
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+ ret = wait_for_completion_timeout(&tspi->xfer_completion,
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+ SLINK_DMA_TIMEOUT);
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+ if (WARN_ON(ret == 0)) {
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+ dev_err(tspi->dev,
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+ "spi trasfer timeout, err %d\n", ret);
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+ return -EIO;
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+ }
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+
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+ if (tspi->tx_status)
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+ return tspi->tx_status;
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+ if (tspi->rx_status)
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+ return tspi->rx_status;
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+
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+ return 0;
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+}
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+
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+static int tegra_slink_unprepare_message(struct spi_master *master,
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+ struct spi_message *msg)
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+{
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+ struct tegra_slink_data *tspi = spi_master_get_devdata(master);
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+
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tegra_slink_writel(tspi, tspi->def_command_reg, SLINK_COMMAND);
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tegra_slink_writel(tspi, tspi->def_command2_reg, SLINK_COMMAND2);
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- msg->status = ret;
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- spi_finalize_current_message(master);
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- return ret;
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+
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+ return 0;
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}
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static irqreturn_t handle_cpu_based_xfer(struct tegra_slink_data *tspi)
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@@ -1078,7 +1071,9 @@ static int tegra_slink_probe(struct platform_device *pdev)
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/* the spi->mode bits understood by this driver: */
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master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
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master->setup = tegra_slink_setup;
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- master->transfer_one_message = tegra_slink_transfer_one_message;
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+ master->prepare_message = tegra_slink_prepare_message;
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+ master->transfer_one = tegra_slink_transfer_one;
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+ master->unprepare_message = tegra_slink_unprepare_message;
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master->auto_runtime_pm = true;
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master->num_chipselect = MAX_CHIP_SELECT;
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master->bus_num = -1;
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