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@@ -49,30 +49,39 @@ void iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq)
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if (txq->need_update == 0)
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return;
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- /* if we're trying to save power */
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- if (test_bit(STATUS_POWER_PMI, &priv->status)) {
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- /* wake up nic if it's powered down ...
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- * uCode will wake up, and interrupt us again, so next
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- * time we'll skip this part. */
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- reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
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-
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- if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
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- IWL_DEBUG_INFO(priv, "Tx queue %d requesting wakeup, GP1 = 0x%x\n",
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- txq_id, reg);
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- iwl_set_bit(priv, CSR_GP_CNTRL,
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- CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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- return;
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- }
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-
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- iwl_write_direct32(priv, HBUS_TARG_WRPTR,
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- txq->q.write_ptr | (txq_id << 8));
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-
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- /* else not in power-save mode, uCode will never sleep when we're
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- * trying to tx (during RFKILL, we're not trying to tx). */
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- } else
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+ if (priv->cfg->base_params->shadow_reg_enable) {
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+ /* shadow register enabled */
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iwl_write32(priv, HBUS_TARG_WRPTR,
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txq->q.write_ptr | (txq_id << 8));
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+ } else {
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+ /* if we're trying to save power */
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+ if (test_bit(STATUS_POWER_PMI, &priv->status)) {
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+ /* wake up nic if it's powered down ...
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+ * uCode will wake up, and interrupt us again, so next
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+ * time we'll skip this part. */
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+ reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
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+
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+ if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
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+ IWL_DEBUG_INFO(priv,
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+ "Tx queue %d requesting wakeup,"
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+ " GP1 = 0x%x\n", txq_id, reg);
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+ iwl_set_bit(priv, CSR_GP_CNTRL,
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+ CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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+ return;
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+ }
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+
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+ iwl_write_direct32(priv, HBUS_TARG_WRPTR,
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+ txq->q.write_ptr | (txq_id << 8));
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+ /*
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+ * else not in power-save mode,
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+ * uCode will never sleep when we're
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+ * trying to tx (during RFKILL, we're not trying to tx).
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+ */
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+ } else
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+ iwl_write32(priv, HBUS_TARG_WRPTR,
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+ txq->q.write_ptr | (txq_id << 8));
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+ }
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txq->need_update = 0;
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}
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EXPORT_SYMBOL(iwl_txq_update_write_ptr);
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