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@@ -210,6 +210,7 @@
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#define PCI_CAP_ID_AGP3 0x0E /* AGP Target PCI-PCI bridge */
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#define PCI_CAP_ID_EXP 0x10 /* PCI Express */
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#define PCI_CAP_ID_MSIX 0x11 /* MSI-X */
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+#define PCI_CAP_ID_AF 0x13 /* PCI Advanced Features */
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#define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */
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#define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */
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#define PCI_CAP_SIZEOF 4
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@@ -316,6 +317,17 @@
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#define PCI_CHSWP_EXT 0x40 /* ENUM# status - extraction */
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#define PCI_CHSWP_INS 0x80 /* ENUM# status - insertion */
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+/* PCI Advanced Feature registers */
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+
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+#define PCI_AF_LENGTH 2
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+#define PCI_AF_CAP 3
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+#define PCI_AF_CAP_TP 0x01
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+#define PCI_AF_CAP_FLR 0x02
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+#define PCI_AF_CTRL 4
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+#define PCI_AF_CTRL_FLR 0x01
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+#define PCI_AF_STATUS 5
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+#define PCI_AF_STATUS_TP 0x01
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+
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/* PCI-X registers */
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#define PCI_X_CMD 2 /* Modes & Features */
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