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@@ -96,13 +96,13 @@ typedef struct s626_board_struct {
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static const s626_board s626_boards[] = {
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{
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name: "s626",
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- ai_chans:S626_ADC_CHANNELS,
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+ ai_chans : S626_ADC_CHANNELS,
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ai_bits: 14,
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- ao_chans:S626_DAC_CHANNELS,
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+ ao_chans : S626_DAC_CHANNELS,
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ao_bits: 13,
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- dio_chans:S626_DIO_CHANNELS,
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- dio_banks:S626_DIO_BANKS,
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- enc_chans:S626_ENCODER_CHANNELS,
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+ dio_chans : S626_DIO_CHANNELS,
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+ dio_banks : S626_DIO_BANKS,
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+ enc_chans : S626_ENCODER_CHANNELS,
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}
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};
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@@ -123,9 +123,9 @@ static int s626_detach(comedi_device *dev);
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static comedi_driver driver_s626 = {
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driver_name:"s626",
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- module:THIS_MODULE,
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- attach:s626_attach,
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- detach:s626_detach,
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+ module : THIS_MODULE,
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+ attach : s626_attach,
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+ detach : s626_detach,
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};
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typedef struct {
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@@ -174,38 +174,38 @@ typedef struct {
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static dio_private dio_private_A = {
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RDDIn:LP_RDDINA,
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- WRDOut:LP_WRDOUTA,
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- RDEdgSel:LP_RDEDGSELA,
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- WREdgSel:LP_WREDGSELA,
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- RDCapSel:LP_RDCAPSELA,
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- WRCapSel:LP_WRCAPSELA,
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- RDCapFlg:LP_RDCAPFLGA,
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- RDIntSel:LP_RDINTSELA,
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- WRIntSel:LP_WRINTSELA,
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+ WRDOut : LP_WRDOUTA,
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+ RDEdgSel : LP_RDEDGSELA,
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+ WREdgSel : LP_WREDGSELA,
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+ RDCapSel : LP_RDCAPSELA,
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+ WRCapSel : LP_WRCAPSELA,
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+ RDCapFlg : LP_RDCAPFLGA,
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+ RDIntSel : LP_RDINTSELA,
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+ WRIntSel : LP_WRINTSELA,
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};
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static dio_private dio_private_B = {
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RDDIn:LP_RDDINB,
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- WRDOut:LP_WRDOUTB,
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- RDEdgSel:LP_RDEDGSELB,
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- WREdgSel:LP_WREDGSELB,
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- RDCapSel:LP_RDCAPSELB,
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- WRCapSel:LP_WRCAPSELB,
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- RDCapFlg:LP_RDCAPFLGB,
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- RDIntSel:LP_RDINTSELB,
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- WRIntSel:LP_WRINTSELB,
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+ WRDOut : LP_WRDOUTB,
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+ RDEdgSel : LP_RDEDGSELB,
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+ WREdgSel : LP_WREDGSELB,
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+ RDCapSel : LP_RDCAPSELB,
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+ WRCapSel : LP_WRCAPSELB,
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+ RDCapFlg : LP_RDCAPFLGB,
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+ RDIntSel : LP_RDINTSELB,
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+ WRIntSel : LP_WRINTSELB,
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};
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static dio_private dio_private_C = {
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RDDIn:LP_RDDINC,
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- WRDOut:LP_WRDOUTC,
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- RDEdgSel:LP_RDEDGSELC,
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- WREdgSel:LP_WREDGSELC,
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- RDCapSel:LP_RDCAPSELC,
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- WRCapSel:LP_WRCAPSELC,
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- RDCapFlg:LP_RDCAPFLGC,
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- RDIntSel:LP_RDINTSELC,
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- WRIntSel:LP_WRINTSELC,
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+ WRDOut : LP_WRDOUTC,
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+ RDEdgSel : LP_RDEDGSELC,
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+ WREdgSel : LP_WREDGSELC,
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+ RDCapSel : LP_RDCAPSELC,
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+ WRCapSel : LP_WRCAPSELC,
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+ RDCapFlg : LP_RDCAPFLGC,
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+ RDIntSel : LP_RDINTSELC,
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+ WRIntSel : LP_WRINTSELC,
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};
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/* to group dio devices (48 bits mask and data are not allowed ???)
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@@ -356,99 +356,99 @@ static void CountersInit(comedi_device *dev);
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static enc_private enc_private_data[] = {
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{
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GetEnable:GetEnable_A,
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- GetIntSrc:GetIntSrc_A,
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- GetLoadTrig:GetLoadTrig_A,
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+ GetIntSrc : GetIntSrc_A,
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+ GetLoadTrig : GetLoadTrig_A,
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GetMode: GetMode_A,
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- PulseIndex:PulseIndex_A,
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- SetEnable:SetEnable_A,
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- SetIntSrc:SetIntSrc_A,
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- SetLoadTrig:SetLoadTrig_A,
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+ PulseIndex : PulseIndex_A,
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+ SetEnable : SetEnable_A,
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+ SetIntSrc : SetIntSrc_A,
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+ SetLoadTrig : SetLoadTrig_A,
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SetMode: SetMode_A,
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- ResetCapFlags:ResetCapFlags_A,
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+ ResetCapFlags : ResetCapFlags_A,
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MyCRA: LP_CR0A,
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MyCRB: LP_CR0B,
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- MyLatchLsw:LP_CNTR0ALSW,
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- MyEventBits:EVBITS(0),
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+ MyLatchLsw : LP_CNTR0ALSW,
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+ MyEventBits : EVBITS(0),
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},
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{
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GetEnable:GetEnable_A,
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- GetIntSrc:GetIntSrc_A,
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- GetLoadTrig:GetLoadTrig_A,
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+ GetIntSrc : GetIntSrc_A,
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+ GetLoadTrig : GetLoadTrig_A,
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GetMode: GetMode_A,
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- PulseIndex:PulseIndex_A,
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- SetEnable:SetEnable_A,
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- SetIntSrc:SetIntSrc_A,
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- SetLoadTrig:SetLoadTrig_A,
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+ PulseIndex : PulseIndex_A,
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+ SetEnable : SetEnable_A,
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+ SetIntSrc : SetIntSrc_A,
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+ SetLoadTrig : SetLoadTrig_A,
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SetMode: SetMode_A,
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- ResetCapFlags:ResetCapFlags_A,
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+ ResetCapFlags : ResetCapFlags_A,
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MyCRA: LP_CR1A,
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MyCRB: LP_CR1B,
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- MyLatchLsw:LP_CNTR1ALSW,
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- MyEventBits:EVBITS(1),
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+ MyLatchLsw : LP_CNTR1ALSW,
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+ MyEventBits : EVBITS(1),
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},
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{
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GetEnable:GetEnable_A,
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- GetIntSrc:GetIntSrc_A,
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- GetLoadTrig:GetLoadTrig_A,
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+ GetIntSrc : GetIntSrc_A,
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+ GetLoadTrig : GetLoadTrig_A,
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GetMode: GetMode_A,
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- PulseIndex:PulseIndex_A,
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- SetEnable:SetEnable_A,
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- SetIntSrc:SetIntSrc_A,
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- SetLoadTrig:SetLoadTrig_A,
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+ PulseIndex : PulseIndex_A,
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+ SetEnable : SetEnable_A,
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+ SetIntSrc : SetIntSrc_A,
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+ SetLoadTrig : SetLoadTrig_A,
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SetMode: SetMode_A,
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- ResetCapFlags:ResetCapFlags_A,
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+ ResetCapFlags : ResetCapFlags_A,
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MyCRA: LP_CR2A,
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MyCRB: LP_CR2B,
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- MyLatchLsw:LP_CNTR2ALSW,
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- MyEventBits:EVBITS(2),
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+ MyLatchLsw : LP_CNTR2ALSW,
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+ MyEventBits : EVBITS(2),
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},
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{
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GetEnable:GetEnable_B,
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- GetIntSrc:GetIntSrc_B,
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- GetLoadTrig:GetLoadTrig_B,
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+ GetIntSrc : GetIntSrc_B,
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+ GetLoadTrig : GetLoadTrig_B,
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GetMode: GetMode_B,
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- PulseIndex:PulseIndex_B,
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- SetEnable:SetEnable_B,
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- SetIntSrc:SetIntSrc_B,
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- SetLoadTrig:SetLoadTrig_B,
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+ PulseIndex : PulseIndex_B,
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+ SetEnable : SetEnable_B,
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+ SetIntSrc : SetIntSrc_B,
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+ SetLoadTrig : SetLoadTrig_B,
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SetMode: SetMode_B,
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- ResetCapFlags:ResetCapFlags_B,
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+ ResetCapFlags : ResetCapFlags_B,
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MyCRA: LP_CR0A,
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MyCRB: LP_CR0B,
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- MyLatchLsw:LP_CNTR0BLSW,
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- MyEventBits:EVBITS(3),
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+ MyLatchLsw : LP_CNTR0BLSW,
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+ MyEventBits : EVBITS(3),
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},
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{
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GetEnable:GetEnable_B,
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- GetIntSrc:GetIntSrc_B,
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- GetLoadTrig:GetLoadTrig_B,
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+ GetIntSrc : GetIntSrc_B,
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+ GetLoadTrig : GetLoadTrig_B,
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GetMode: GetMode_B,
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- PulseIndex:PulseIndex_B,
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- SetEnable:SetEnable_B,
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- SetIntSrc:SetIntSrc_B,
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- SetLoadTrig:SetLoadTrig_B,
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+ PulseIndex : PulseIndex_B,
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+ SetEnable : SetEnable_B,
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+ SetIntSrc : SetIntSrc_B,
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+ SetLoadTrig : SetLoadTrig_B,
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SetMode: SetMode_B,
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- ResetCapFlags:ResetCapFlags_B,
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+ ResetCapFlags : ResetCapFlags_B,
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MyCRA: LP_CR1A,
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MyCRB: LP_CR1B,
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- MyLatchLsw:LP_CNTR1BLSW,
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- MyEventBits:EVBITS(4),
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+ MyLatchLsw : LP_CNTR1BLSW,
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+ MyEventBits : EVBITS(4),
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},
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{
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GetEnable:GetEnable_B,
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- GetIntSrc:GetIntSrc_B,
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- GetLoadTrig:GetLoadTrig_B,
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+ GetIntSrc : GetIntSrc_B,
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+ GetLoadTrig : GetLoadTrig_B,
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GetMode: GetMode_B,
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- PulseIndex:PulseIndex_B,
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- SetEnable:SetEnable_B,
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- SetIntSrc:SetIntSrc_B,
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- SetLoadTrig:SetLoadTrig_B,
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+ PulseIndex : PulseIndex_B,
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+ SetEnable : SetEnable_B,
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+ SetIntSrc : SetIntSrc_B,
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+ SetLoadTrig : SetLoadTrig_B,
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SetMode: SetMode_B,
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- ResetCapFlags:ResetCapFlags_B,
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+ ResetCapFlags : ResetCapFlags_B,
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MyCRA: LP_CR2A,
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MyCRB: LP_CR2B,
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- MyLatchLsw:LP_CNTR2BLSW,
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- MyEventBits:EVBITS(5),
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+ MyLatchLsw : LP_CNTR2BLSW,
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+ MyEventBits : EVBITS(5),
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},
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};
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