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@@ -70,19 +70,31 @@
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movt \reg, #:upper16:\val
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.endm
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+/* Marco to check CPU part num */
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+.macro check_cpu_part_num part_num, tmp1, tmp2
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+ mrc p15, 0, \tmp1, c0, c0, 0
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+ ubfx \tmp1, \tmp1, #4, #12
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+ mov32 \tmp2, \part_num
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+ cmp \tmp1, \tmp2
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+.endm
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+
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/* Macro to exit SMP coherency. */
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.macro exit_smp, tmp1, tmp2
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mrc p15, 0, \tmp1, c1, c0, 1 @ ACTLR
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bic \tmp1, \tmp1, #(1<<6) | (1<<0) @ clear ACTLR.SMP | ACTLR.FW
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mcr p15, 0, \tmp1, c1, c0, 1 @ ACTLR
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isb
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- cpu_id \tmp1
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- mov \tmp1, \tmp1, lsl #2
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- mov \tmp2, #0xf
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- mov \tmp2, \tmp2, lsl \tmp1
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- mov32 \tmp1, TEGRA_ARM_PERIF_VIRT + 0xC
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- str \tmp2, [\tmp1] @ invalidate SCU tags for CPU
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+#ifdef CONFIG_HAVE_ARM_SCU
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+ check_cpu_part_num 0xc09, \tmp1, \tmp2
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+ mrceq p15, 0, \tmp1, c0, c0, 5
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+ andeq \tmp1, \tmp1, #0xF
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+ moveq \tmp1, \tmp1, lsl #2
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+ moveq \tmp2, #0xf
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+ moveq \tmp2, \tmp2, lsl \tmp1
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+ ldreq \tmp1, =(TEGRA_ARM_PERIF_VIRT + 0xC)
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+ streq \tmp2, [\tmp1] @ invalidate SCU tags for CPU
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dsb
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+#endif
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.endm
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/* Macro to check Tegra revision */
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