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@@ -866,9 +866,8 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir)
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if (tune_dir == TUNE_RX) {
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SD_VP_CTL = SD_VPRX_CTL;
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SD_DCMPS_CTL = SD_DCMPS_RX_CTL;
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- if (CHK_SD_DDR50(sd_card)) {
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+ if (CHK_SD_DDR50(sd_card))
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ddr_rx = 1;
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- }
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} else {
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SD_VP_CTL = SD_VPTX_CTL;
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SD_DCMPS_CTL = SD_DCMPS_TX_CTL;
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@@ -905,23 +904,22 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir)
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rtsx_add_cmd(chip, WRITE_REG_CMD, SD_DCMPS_CTL, DCMPS_CHANGE, DCMPS_CHANGE);
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rtsx_add_cmd(chip, CHECK_REG_CMD, SD_DCMPS_CTL, DCMPS_CHANGE_DONE, DCMPS_CHANGE_DONE);
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retval = rtsx_send_cmd(chip, SD_CARD, 100);
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- if (retval != STATUS_SUCCESS) {
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+ if (retval != STATUS_SUCCESS)
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TRACE_GOTO(chip, Fail);
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- }
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val = *rtsx_get_cmd_data(chip);
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- if (val & DCMPS_ERROR) {
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+ if (val & DCMPS_ERROR)
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TRACE_GOTO(chip, Fail);
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- }
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- if ((val & DCMPS_CURRENT_PHASE) != sample_point) {
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+
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+ if ((val & DCMPS_CURRENT_PHASE) != sample_point)
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TRACE_GOTO(chip, Fail);
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- }
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+
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RTSX_WRITE_REG(chip, SD_DCMPS_CTL, DCMPS_CHANGE, 0);
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- if (ddr_rx) {
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+ if (ddr_rx)
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RTSX_WRITE_REG(chip, SD_VP_CTL, PHASE_CHANGE, 0);
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- } else {
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+ else
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RTSX_WRITE_REG(chip, CLK_CTL, CHANGE_CLK, 0);
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- }
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+
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udelay(50);
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}
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