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@@ -82,10 +82,12 @@
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* will also impact the individual peripheral rates.
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*/
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+#include <linux/export.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/errno.h>
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#include <linux/device.h>
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+#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/amba/bus.h>
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@@ -97,9 +99,12 @@
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#include "clock.h"
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#include "common.h"
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+static DEFINE_SPINLOCK(global_clkregs_lock);
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+
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+static int usb_pll_enable, usb_pll_valid;
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+
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static struct clk clk_armpll;
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static struct clk clk_usbpll;
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-static DEFINE_MUTEX(clkm_lock);
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/*
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* Post divider values for PLLs based on selected register value
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@@ -127,7 +132,7 @@ static struct clk osc_32KHz = {
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static int local_pll397_enable(struct clk *clk, int enable)
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{
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u32 reg;
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- unsigned long timeout = 1 + msecs_to_jiffies(10);
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+ unsigned long timeout = jiffies + msecs_to_jiffies(10);
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reg = __raw_readl(LPC32XX_CLKPWR_PLL397_CTRL);
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@@ -142,7 +147,7 @@ static int local_pll397_enable(struct clk *clk, int enable)
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/* Wait for PLL397 lock */
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while (((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) &
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LPC32XX_CLKPWR_SYSCTRL_PLL397_STS) == 0) &&
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- (timeout > jiffies))
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+ time_before(jiffies, timeout))
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cpu_relax();
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if ((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) &
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@@ -156,7 +161,7 @@ static int local_pll397_enable(struct clk *clk, int enable)
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static int local_oscmain_enable(struct clk *clk, int enable)
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{
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u32 reg;
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- unsigned long timeout = 1 + msecs_to_jiffies(10);
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+ unsigned long timeout = jiffies + msecs_to_jiffies(10);
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reg = __raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL);
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@@ -171,7 +176,7 @@ static int local_oscmain_enable(struct clk *clk, int enable)
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/* Wait for main oscillator to start */
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while (((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) &
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LPC32XX_CLKPWR_MOSC_DISABLE) != 0) &&
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- (timeout > jiffies))
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+ time_before(jiffies, timeout))
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cpu_relax();
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if ((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) &
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@@ -382,30 +387,62 @@ static u32 local_clk_usbpll_setup(struct clk_pll_setup *pHCLKPllSetup)
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static int local_usbpll_enable(struct clk *clk, int enable)
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{
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u32 reg;
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- int ret = -ENODEV;
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- unsigned long timeout = 1 + msecs_to_jiffies(10);
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+ int ret = 0;
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+ unsigned long timeout = jiffies + msecs_to_jiffies(20);
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reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
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- if (enable == 0) {
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- reg &= ~(LPC32XX_CLKPWR_USBCTRL_CLK_EN1 |
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- LPC32XX_CLKPWR_USBCTRL_CLK_EN2);
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- __raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
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- } else if (reg & LPC32XX_CLKPWR_USBCTRL_PLL_PWRUP) {
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+ __raw_writel(reg & ~(LPC32XX_CLKPWR_USBCTRL_CLK_EN2 |
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+ LPC32XX_CLKPWR_USBCTRL_PLL_PWRUP),
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+ LPC32XX_CLKPWR_USB_CTRL);
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+ __raw_writel(reg & ~LPC32XX_CLKPWR_USBCTRL_CLK_EN1,
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+ LPC32XX_CLKPWR_USB_CTRL);
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+
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+ if (enable && usb_pll_valid && usb_pll_enable) {
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+ ret = -ENODEV;
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+ /*
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+ * If the PLL rate has been previously set, then the rate
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+ * in the PLL register is valid and can be enabled here.
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+ * Otherwise, it needs to be enabled as part of setrate.
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+ */
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+
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+ /*
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+ * Gate clock into PLL
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+ */
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reg |= LPC32XX_CLKPWR_USBCTRL_CLK_EN1;
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__raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
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- /* Wait for PLL lock */
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- while ((timeout > jiffies) & (ret == -ENODEV)) {
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+ /*
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+ * Enable PLL
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+ */
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+ reg |= LPC32XX_CLKPWR_USBCTRL_PLL_PWRUP;
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+ __raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
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+
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+ /*
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+ * Wait for PLL to lock
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+ */
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+ while (time_before(jiffies, timeout) && (ret == -ENODEV)) {
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reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
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if (reg & LPC32XX_CLKPWR_USBCTRL_PLL_STS)
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ret = 0;
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+ else
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+ udelay(10);
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}
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+ /*
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+ * Gate clock from PLL if PLL is locked
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+ */
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if (ret == 0) {
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- reg |= LPC32XX_CLKPWR_USBCTRL_CLK_EN2;
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- __raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
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+ __raw_writel(reg | LPC32XX_CLKPWR_USBCTRL_CLK_EN2,
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+ LPC32XX_CLKPWR_USB_CTRL);
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+ } else {
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+ __raw_writel(reg & ~(LPC32XX_CLKPWR_USBCTRL_CLK_EN1 |
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+ LPC32XX_CLKPWR_USBCTRL_PLL_PWRUP),
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+ LPC32XX_CLKPWR_USB_CTRL);
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}
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+ } else if ((enable == 0) && usb_pll_valid && usb_pll_enable) {
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+ usb_pll_valid = 0;
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+ usb_pll_enable = 0;
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}
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return ret;
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@@ -423,7 +460,7 @@ static unsigned long local_usbpll_round_rate(struct clk *clk,
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*/
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rate = rate * 1000;
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- clkin = clk->parent->rate;
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+ clkin = clk->get_rate(clk);
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usbdiv = (__raw_readl(LPC32XX_CLKPWR_USBCLK_PDIV) &
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LPC32XX_CLKPWR_USBPDIV_PLL_MASK) + 1;
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clkin = clkin / usbdiv;
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@@ -437,7 +474,8 @@ static unsigned long local_usbpll_round_rate(struct clk *clk,
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static int local_usbpll_set_rate(struct clk *clk, unsigned long rate)
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{
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- u32 clkin, reg, usbdiv;
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+ int ret = -ENODEV;
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+ u32 clkin, usbdiv;
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struct clk_pll_setup pllsetup;
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/*
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@@ -446,7 +484,7 @@ static int local_usbpll_set_rate(struct clk *clk, unsigned long rate)
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*/
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rate = rate * 1000;
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- clkin = clk->get_rate(clk);
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+ clkin = clk->get_rate(clk->parent);
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usbdiv = (__raw_readl(LPC32XX_CLKPWR_USBCLK_PDIV) &
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LPC32XX_CLKPWR_USBPDIV_PLL_MASK) + 1;
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clkin = clkin / usbdiv;
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@@ -455,22 +493,25 @@ static int local_usbpll_set_rate(struct clk *clk, unsigned long rate)
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if (local_clk_find_pll_cfg(clkin, rate, &pllsetup) == 0)
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return -EINVAL;
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+ /*
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+ * Disable PLL clocks during PLL change
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+ */
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local_usbpll_enable(clk, 0);
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-
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- reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
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- reg |= LPC32XX_CLKPWR_USBCTRL_CLK_EN1;
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- __raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
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-
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- pllsetup.analog_on = 1;
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+ pllsetup.analog_on = 0;
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local_clk_usbpll_setup(&pllsetup);
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- clk->rate = clk_check_pll_setup(clkin, &pllsetup);
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+ /*
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+ * Start USB PLL and check PLL status
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+ */
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- reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
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- reg |= LPC32XX_CLKPWR_USBCTRL_CLK_EN2;
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- __raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
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+ usb_pll_valid = 1;
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+ usb_pll_enable = 1;
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- return 0;
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+ ret = local_usbpll_enable(clk, 1);
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+ if (ret >= 0)
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+ clk->rate = clk_check_pll_setup(clkin, &pllsetup);
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+
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+ return ret;
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}
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static struct clk clk_usbpll = {
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@@ -926,20 +967,8 @@ static struct clk clk_lcd = {
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.enable_mask = LPC32XX_CLKPWR_LCDCTRL_CLK_EN,
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};
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-static inline void clk_lock(void)
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-{
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- mutex_lock(&clkm_lock);
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-}
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-
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-static inline void clk_unlock(void)
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-{
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- mutex_unlock(&clkm_lock);
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-}
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-
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static void local_clk_disable(struct clk *clk)
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{
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- WARN_ON(clk->usecount == 0);
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-
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/* Don't attempt to disable clock if it has no users */
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if (clk->usecount > 0) {
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clk->usecount--;
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@@ -982,10 +1011,11 @@ static int local_clk_enable(struct clk *clk)
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int clk_enable(struct clk *clk)
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{
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int ret;
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+ unsigned long flags;
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- clk_lock();
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+ spin_lock_irqsave(&global_clkregs_lock, flags);
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ret = local_clk_enable(clk);
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- clk_unlock();
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+ spin_unlock_irqrestore(&global_clkregs_lock, flags);
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return ret;
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}
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@@ -996,9 +1026,11 @@ EXPORT_SYMBOL(clk_enable);
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*/
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void clk_disable(struct clk *clk)
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{
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- clk_lock();
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+ unsigned long flags;
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+
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+ spin_lock_irqsave(&global_clkregs_lock, flags);
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local_clk_disable(clk);
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- clk_unlock();
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+ spin_unlock_irqrestore(&global_clkregs_lock, flags);
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}
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EXPORT_SYMBOL(clk_disable);
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@@ -1007,13 +1039,7 @@ EXPORT_SYMBOL(clk_disable);
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*/
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unsigned long clk_get_rate(struct clk *clk)
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{
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- unsigned long rate;
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-
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- clk_lock();
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- rate = clk->get_rate(clk);
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- clk_unlock();
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-
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- return rate;
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+ return clk->get_rate(clk);
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}
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EXPORT_SYMBOL(clk_get_rate);
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@@ -1029,11 +1055,8 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
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* the actual rate set as part of the peripheral dividers
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* instead of high level clock control
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*/
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- if (clk->set_rate) {
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- clk_lock();
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+ if (clk->set_rate)
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ret = clk->set_rate(clk, rate);
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- clk_unlock();
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- }
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return ret;
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}
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@@ -1044,15 +1067,11 @@ EXPORT_SYMBOL(clk_set_rate);
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*/
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long clk_round_rate(struct clk *clk, unsigned long rate)
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{
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- clk_lock();
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-
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if (clk->round_rate)
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rate = clk->round_rate(clk, rate);
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else
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rate = clk->get_rate(clk);
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- clk_unlock();
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-
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return rate;
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}
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EXPORT_SYMBOL(clk_round_rate);
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@@ -1110,12 +1129,12 @@ static struct clk_lookup lookups[] = {
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_REGISTER_CLOCK("dev:ssp1", NULL, clk_ssp1)
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_REGISTER_CLOCK("lpc32xx_keys.0", NULL, clk_kscan)
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_REGISTER_CLOCK("lpc32xx-nand.0", "nand_ck", clk_nand)
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+ _REGISTER_CLOCK(NULL, "i2s0_ck", clk_i2s0)
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+ _REGISTER_CLOCK(NULL, "i2s1_ck", clk_i2s1)
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_REGISTER_CLOCK("lpc32xx-adc", NULL, clk_adc)
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- _REGISTER_CLOCK("tbd", "i2s0_ck", clk_i2s0)
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- _REGISTER_CLOCK("tbd", "i2s1_ck", clk_i2s1)
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_REGISTER_CLOCK("ts-lpc32xx", NULL, clk_tsc)
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- _REGISTER_CLOCK("dev:mmc0", "MCLK", clk_mmc)
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- _REGISTER_CLOCK("lpc-net.0", NULL, clk_net)
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+ _REGISTER_CLOCK("dev:mmc0", NULL, clk_mmc)
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+ _REGISTER_CLOCK("lpc-eth.0", NULL, clk_net)
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_REGISTER_CLOCK("dev:clcd", NULL, clk_lcd)
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_REGISTER_CLOCK("lpc32xx_udc", "ck_usbd", clk_usbd)
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_REGISTER_CLOCK("lpc32xx_rtc", NULL, clk_rtc)
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Arnd Bergmann