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@@ -2249,7 +2249,7 @@ static void tg3_nvram_unlock(struct tg3 *tp)
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static void tg3_enable_nvram_access(struct tg3 *tp)
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static void tg3_enable_nvram_access(struct tg3 *tp)
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{
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{
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if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
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if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
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- !(tp->tg3_flags2 & TG3_FLG2_PROTECTED_NVRAM)) {
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+ !(tp->tg3_flags3 & TG3_FLG3_PROTECTED_NVRAM)) {
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u32 nvaccess = tr32(NVRAM_ACCESS);
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u32 nvaccess = tr32(NVRAM_ACCESS);
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tw32(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
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tw32(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
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@@ -2260,7 +2260,7 @@ static void tg3_enable_nvram_access(struct tg3 *tp)
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static void tg3_disable_nvram_access(struct tg3 *tp)
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static void tg3_disable_nvram_access(struct tg3 *tp)
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{
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{
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if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
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if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
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- !(tp->tg3_flags2 & TG3_FLG2_PROTECTED_NVRAM)) {
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+ !(tp->tg3_flags3 & TG3_FLG3_PROTECTED_NVRAM)) {
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u32 nvaccess = tr32(NVRAM_ACCESS);
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u32 nvaccess = tr32(NVRAM_ACCESS);
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tw32(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
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tw32(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
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@@ -10970,7 +10970,7 @@ static void __devinit tg3_get_5752_nvram_info(struct tg3 *tp)
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/* NVRAM protection for TPM */
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/* NVRAM protection for TPM */
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if (nvcfg1 & (1 << 27))
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if (nvcfg1 & (1 << 27))
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- tp->tg3_flags2 |= TG3_FLG2_PROTECTED_NVRAM;
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+ tp->tg3_flags3 |= TG3_FLG3_PROTECTED_NVRAM;
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switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {
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switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {
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case FLASH_5752VENDOR_ATMEL_EEPROM_64KHZ:
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case FLASH_5752VENDOR_ATMEL_EEPROM_64KHZ:
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@@ -11011,7 +11011,7 @@ static void __devinit tg3_get_5755_nvram_info(struct tg3 *tp)
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/* NVRAM protection for TPM */
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/* NVRAM protection for TPM */
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if (nvcfg1 & (1 << 27)) {
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if (nvcfg1 & (1 << 27)) {
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- tp->tg3_flags2 |= TG3_FLG2_PROTECTED_NVRAM;
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+ tp->tg3_flags3 |= TG3_FLG3_PROTECTED_NVRAM;
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protect = 1;
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protect = 1;
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}
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}
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@@ -11105,7 +11105,7 @@ static void __devinit tg3_get_5761_nvram_info(struct tg3 *tp)
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/* NVRAM protection for TPM */
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/* NVRAM protection for TPM */
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if (nvcfg1 & (1 << 27)) {
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if (nvcfg1 & (1 << 27)) {
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- tp->tg3_flags2 |= TG3_FLG2_PROTECTED_NVRAM;
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+ tp->tg3_flags3 |= TG3_FLG3_PROTECTED_NVRAM;
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protect = 1;
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protect = 1;
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}
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}
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@@ -11607,7 +11607,7 @@ static int tg3_nvram_write_block(struct tg3 *tp, u32 offset, u32 len, u8 *buf)
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tg3_enable_nvram_access(tp);
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tg3_enable_nvram_access(tp);
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if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
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if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
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- !(tp->tg3_flags2 & TG3_FLG2_PROTECTED_NVRAM))
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+ !(tp->tg3_flags3 & TG3_FLG3_PROTECTED_NVRAM))
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tw32(NVRAM_WRITE1, 0x406);
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tw32(NVRAM_WRITE1, 0x406);
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grc_mode = tr32(GRC_MODE);
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grc_mode = tr32(GRC_MODE);
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