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@@ -140,7 +140,7 @@ struct pmx_driver pmx_driver = {
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};
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/* spear3xx shared irq */
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-struct shirq_dev_config shirq_ras1_config[] = {
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+static struct shirq_dev_config shirq_ras1_config[] = {
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{
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.virq = VIRQ_SMII0,
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.status_mask = SMII0_IRQ_MASK,
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@@ -168,7 +168,7 @@ struct shirq_dev_config shirq_ras1_config[] = {
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},
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};
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-struct spear_shirq shirq_ras1 = {
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+static struct spear_shirq shirq_ras1 = {
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.irq = IRQ_GEN_RAS_1,
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.dev_config = shirq_ras1_config,
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.dev_count = ARRAY_SIZE(shirq_ras1_config),
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@@ -180,7 +180,7 @@ struct spear_shirq shirq_ras1 = {
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},
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};
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-struct shirq_dev_config shirq_ras2_config[] = {
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+static struct shirq_dev_config shirq_ras2_config[] = {
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{
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.virq = VIRQ_UART1,
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.status_mask = UART1_IRQ_MASK,
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@@ -199,7 +199,7 @@ struct shirq_dev_config shirq_ras2_config[] = {
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},
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};
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-struct spear_shirq shirq_ras2 = {
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+static struct spear_shirq shirq_ras2 = {
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.irq = IRQ_GEN_RAS_2,
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.dev_config = shirq_ras2_config,
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.dev_count = ARRAY_SIZE(shirq_ras2_config),
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@@ -211,14 +211,14 @@ struct spear_shirq shirq_ras2 = {
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},
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};
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-struct shirq_dev_config shirq_ras3_config[] = {
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+static struct shirq_dev_config shirq_ras3_config[] = {
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{
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.virq = VIRQ_EMI,
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.status_mask = EMI_IRQ_MASK,
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},
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};
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-struct spear_shirq shirq_ras3 = {
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+static struct spear_shirq shirq_ras3 = {
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.irq = IRQ_GEN_RAS_3,
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.dev_config = shirq_ras3_config,
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.dev_count = ARRAY_SIZE(shirq_ras3_config),
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@@ -230,7 +230,7 @@ struct spear_shirq shirq_ras3 = {
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},
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};
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-struct shirq_dev_config shirq_intrcomm_ras_config[] = {
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+static struct shirq_dev_config shirq_intrcomm_ras_config[] = {
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{
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.virq = VIRQ_TDM_HDLC,
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.status_mask = TDM_HDLC_IRQ_MASK,
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@@ -243,7 +243,7 @@ struct shirq_dev_config shirq_intrcomm_ras_config[] = {
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},
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};
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-struct spear_shirq shirq_intrcomm_ras = {
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+static struct spear_shirq shirq_intrcomm_ras = {
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.irq = IRQ_INTRCOMM_RAS_ARM,
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.dev_config = shirq_intrcomm_ras_config,
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.dev_count = ARRAY_SIZE(shirq_intrcomm_ras_config),
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