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@@ -54,8 +54,6 @@ struct aligninfo {
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/* DSISR bits reported for a DCBZ instruction: */
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#define DCBZ 0x5f /* 8xx/82xx dcbz faults when cache not enabled */
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-#define SWAP(a, b) (t = (a), (a) = (b), (b) = t)
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-
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/*
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* The PowerPC stores certain bits of the instruction that caused the
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* alignment exception in the DSISR register. This array maps those
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@@ -458,7 +456,7 @@ static struct aligninfo spe_aligninfo[32] = {
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static int emulate_spe(struct pt_regs *regs, unsigned int reg,
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unsigned int instr)
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{
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- int t, ret;
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+ int ret;
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union {
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u64 ll;
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u32 w[2];
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@@ -581,24 +579,18 @@ static int emulate_spe(struct pt_regs *regs, unsigned int reg,
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if (flags & SW) {
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switch (flags & 0xf0) {
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case E8:
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- SWAP(data.v[0], data.v[7]);
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- SWAP(data.v[1], data.v[6]);
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- SWAP(data.v[2], data.v[5]);
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- SWAP(data.v[3], data.v[4]);
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+ data.ll = swab64(data.ll);
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break;
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case E4:
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-
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- SWAP(data.v[0], data.v[3]);
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- SWAP(data.v[1], data.v[2]);
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- SWAP(data.v[4], data.v[7]);
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- SWAP(data.v[5], data.v[6]);
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+ data.w[0] = swab32(data.w[0]);
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+ data.w[1] = swab32(data.w[1]);
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break;
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/* Its half word endian */
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default:
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- SWAP(data.v[0], data.v[1]);
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- SWAP(data.v[2], data.v[3]);
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- SWAP(data.v[4], data.v[5]);
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- SWAP(data.v[6], data.v[7]);
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+ data.h[0] = swab16(data.h[0]);
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+ data.h[1] = swab16(data.h[1]);
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+ data.h[2] = swab16(data.h[2]);
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+ data.h[3] = swab16(data.h[3]);
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break;
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}
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}
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@@ -710,7 +702,7 @@ int fix_alignment(struct pt_regs *regs)
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unsigned int dsisr;
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unsigned char __user *addr;
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unsigned long p, swiz;
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- int ret, t;
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+ int ret;
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union {
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u64 ll;
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double dd;
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@@ -915,17 +907,13 @@ int fix_alignment(struct pt_regs *regs)
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if (flags & SW) {
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switch (nb) {
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case 8:
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- SWAP(data.v[0], data.v[7]);
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- SWAP(data.v[1], data.v[6]);
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- SWAP(data.v[2], data.v[5]);
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- SWAP(data.v[3], data.v[4]);
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+ data.ll = swab64(data.ll);
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break;
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case 4:
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- SWAP(data.v[4], data.v[7]);
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- SWAP(data.v[5], data.v[6]);
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+ data.x32.low32 = swab32(data.x32.low32);
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break;
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case 2:
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- SWAP(data.v[6], data.v[7]);
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+ data.x16.low16 = swab16(data.x16.low16);
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break;
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}
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}
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