|
@@ -881,13 +881,6 @@ pci_disable_device(struct pci_dev *dev)
|
|
|
if (atomic_sub_return(1, &dev->enable_cnt) != 0)
|
|
|
return;
|
|
|
|
|
|
- if (dev->msi_enabled)
|
|
|
- disable_msi_mode(dev, pci_find_capability(dev, PCI_CAP_ID_MSI),
|
|
|
- PCI_CAP_ID_MSI);
|
|
|
- if (dev->msix_enabled)
|
|
|
- disable_msi_mode(dev, pci_find_capability(dev, PCI_CAP_ID_MSI),
|
|
|
- PCI_CAP_ID_MSIX);
|
|
|
-
|
|
|
pci_read_config_word(dev, PCI_COMMAND, &pci_command);
|
|
|
if (pci_command & PCI_COMMAND_MASTER) {
|
|
|
pci_command &= ~PCI_COMMAND_MASTER;
|
|
@@ -1277,6 +1270,33 @@ pci_intx(struct pci_dev *pdev, int enable)
|
|
|
}
|
|
|
}
|
|
|
|
|
|
+/**
|
|
|
+ * pci_msi_off - disables any msi or msix capabilities
|
|
|
+ * @pdev: the PCI device to operate on
|
|
|
+ *
|
|
|
+ * If you want to use msi see pci_enable_msi and friends.
|
|
|
+ * This is a lower level primitive that allows us to disable
|
|
|
+ * msi operation at the device level.
|
|
|
+ */
|
|
|
+void pci_msi_off(struct pci_dev *dev)
|
|
|
+{
|
|
|
+ int pos;
|
|
|
+ u16 control;
|
|
|
+
|
|
|
+ pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
|
|
|
+ if (pos) {
|
|
|
+ pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
|
|
|
+ control &= ~PCI_MSI_FLAGS_ENABLE;
|
|
|
+ pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
|
|
|
+ }
|
|
|
+ pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
|
|
|
+ if (pos) {
|
|
|
+ pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
|
|
|
+ control &= ~PCI_MSIX_FLAGS_ENABLE;
|
|
|
+ pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
#ifndef HAVE_ARCH_PCI_SET_DMA_MASK
|
|
|
/*
|
|
|
* These can be overridden by arch-specific implementations
|