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@@ -68,7 +68,8 @@ MODULE_LICENSE("GPL");
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MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
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MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
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"{Intel, ICH6M},"
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"{Intel, ICH6M},"
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"{Intel, ICH7},"
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"{Intel, ICH7},"
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- "{Intel, ESB2}}");
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+ "{Intel, ESB2},"
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+ "{ATI, SB450}}");
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MODULE_DESCRIPTION("Intel HDA driver");
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MODULE_DESCRIPTION("Intel HDA driver");
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#define SFX "hda-intel: "
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#define SFX "hda-intel: "
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@@ -153,7 +154,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
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/* STATESTS int mask: SD2,SD1,SD0 */
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/* STATESTS int mask: SD2,SD1,SD0 */
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#define STATESTS_INT_MASK 0x07
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#define STATESTS_INT_MASK 0x07
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-#define AZX_MAX_CODECS 3
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+#define AZX_MAX_CODECS 4
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/* SD_CTL bits */
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/* SD_CTL bits */
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#define SD_CTL_STREAM_RESET 0x01 /* stream reset bit */
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#define SD_CTL_STREAM_RESET 0x01 /* stream reset bit */
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@@ -193,6 +194,12 @@ enum {
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POS_FIX_POSBUF
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POS_FIX_POSBUF
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};
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};
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+/* Defines for ATI HD Audio support in SB450 south bridge */
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+#define ATI_SB450_HDAUDIO_PCI_DEVICE_ID 0x437b
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+#define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR 0x42
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+#define ATI_SB450_HDAUDIO_ENABLE_SNOOP 0x02
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+
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+
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/*
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/*
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* Use CORB/RIRB for communication from/to codecs.
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* Use CORB/RIRB for communication from/to codecs.
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* This is the way recommended by Intel (see below).
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* This is the way recommended by Intel (see below).
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@@ -644,7 +651,7 @@ static void azx_stream_stop(azx_t *chip, azx_dev_t *azx_dev)
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*/
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*/
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static void azx_init_chip(azx_t *chip)
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static void azx_init_chip(azx_t *chip)
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{
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{
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- unsigned char tcsel_reg;
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+ unsigned char tcsel_reg, ati_misc_cntl2;
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/* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
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/* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
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* TCSEL == Traffic Class Select Register, which sets PCI express QOS
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* TCSEL == Traffic Class Select Register, which sets PCI express QOS
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@@ -668,6 +675,15 @@ static void azx_init_chip(azx_t *chip)
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azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr);
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azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr);
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azx_writel(chip, DPUBASE, upper_32bit(chip->posbuf.addr));
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azx_writel(chip, DPUBASE, upper_32bit(chip->posbuf.addr));
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}
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}
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+
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+ /* For ATI SB450 azalia HD audio, we need to enable snoop */
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+ if (chip->pci->vendor == PCI_VENDOR_ID_ATI &&
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+ chip->pci->device == ATI_SB450_HDAUDIO_PCI_DEVICE_ID) {
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+ pci_read_config_byte(chip->pci, ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR,
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+ &ati_misc_cntl2);
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+ pci_write_config_byte(chip->pci, ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR,
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+ (ati_misc_cntl2 & 0xf8) | ATI_SB450_HDAUDIO_ENABLE_SNOOP);
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+ }
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}
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}
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@@ -1435,6 +1451,7 @@ static struct pci_device_id azx_ids[] = {
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{ 0x8086, 0x2668, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICH6 */
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{ 0x8086, 0x2668, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICH6 */
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{ 0x8086, 0x27d8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICH7 */
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{ 0x8086, 0x27d8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICH7 */
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{ 0x8086, 0x269a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ESB2 */
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{ 0x8086, 0x269a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ESB2 */
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+ { 0x1002, 0x437b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ATI SB450 */
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{ 0, }
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{ 0, }
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};
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};
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MODULE_DEVICE_TABLE(pci, azx_ids);
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MODULE_DEVICE_TABLE(pci, azx_ids);
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