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@@ -75,6 +75,15 @@ ENTRY(_cplb_mgr)
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* from the configuration table.
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*/
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+ /* A multi-word instruction can cross a page boundary. This means the
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+ * first part of the instruction can be in a valid page, but the
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+ * second part is not, and hence generates the instruction miss.
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+ * However, the fault address is for the start of the instruction,
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+ * not the part that's in the bad page. Therefore, we have to check
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+ * whether the fault address applies to a page that is already present
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+ * in the table.
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+ */
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+
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P4.L = LO(ICPLB_FAULT_ADDR);
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P4.H = HI(ICPLB_FAULT_ADDR);
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@@ -87,7 +96,7 @@ ENTRY(_cplb_mgr)
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R4 = [P4]; /* Get faulting address*/
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R6 = 64; /* Advance past the fault address, which*/
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R6 = R6 + R4; /* we'll use if we find a match*/
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- R3 = ((16 << 8) | 2); /* Extract mask, bits 16 and 17.*/
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+ R3 = ((16 << 8) | 2); /* Extract mask, two bits at posn 16 */
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R5 = 0;
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.Lisearch:
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@@ -125,7 +134,9 @@ ENTRY(_cplb_mgr)
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P4.L = LO(IMEM_CONTROL);
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P4.H = HI(IMEM_CONTROL);
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- /* disable cplbs */
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+ /* Turn off CPLBs while we work, necessary according to HRM before
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+ * modifying CPLB descriptors
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+ */
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R5 = [P4]; /* Control Register*/
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BITCLR(R5,ENICPLB_P);
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CLI R1;
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