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@@ -116,7 +116,7 @@ static inline void __iomem *mvebu_gpioreg_edge_cause(struct mvebu_gpio_chip *mvc
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{
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int cpu;
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- switch(mvchip->soc_variant) {
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+ switch (mvchip->soc_variant) {
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case MVEBU_GPIO_SOC_VARIANT_ORION:
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case MVEBU_GPIO_SOC_VARIANT_MV78200:
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return mvchip->membase + GPIO_EDGE_CAUSE_OFF;
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@@ -132,7 +132,7 @@ static inline void __iomem *mvebu_gpioreg_edge_mask(struct mvebu_gpio_chip *mvch
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{
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int cpu;
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- switch(mvchip->soc_variant) {
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+ switch (mvchip->soc_variant) {
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case MVEBU_GPIO_SOC_VARIANT_ORION:
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return mvchip->membase + GPIO_EDGE_MASK_OFF;
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case MVEBU_GPIO_SOC_VARIANT_MV78200:
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@@ -150,7 +150,7 @@ static void __iomem *mvebu_gpioreg_level_mask(struct mvebu_gpio_chip *mvchip)
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{
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int cpu;
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- switch(mvchip->soc_variant) {
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+ switch (mvchip->soc_variant) {
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case MVEBU_GPIO_SOC_VARIANT_ORION:
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return mvchip->membase + GPIO_LEVEL_MASK_OFF;
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case MVEBU_GPIO_SOC_VARIANT_MV78200:
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@@ -400,7 +400,7 @@ static int mvebu_gpio_irq_set_type(struct irq_data *d, unsigned int type)
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/*
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* Configure interrupt polarity.
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*/
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- switch(type) {
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+ switch (type) {
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case IRQ_TYPE_EDGE_RISING:
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case IRQ_TYPE_LEVEL_HIGH:
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u = readl_relaxed(mvebu_gpioreg_in_pol(mvchip));
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@@ -472,15 +472,15 @@ static void mvebu_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
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static struct of_device_id mvebu_gpio_of_match[] = {
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{
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.compatible = "marvell,orion-gpio",
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- .data = (void*) MVEBU_GPIO_SOC_VARIANT_ORION,
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+ .data = (void *) MVEBU_GPIO_SOC_VARIANT_ORION,
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},
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{
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.compatible = "marvell,mv78200-gpio",
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- .data = (void*) MVEBU_GPIO_SOC_VARIANT_MV78200,
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+ .data = (void *) MVEBU_GPIO_SOC_VARIANT_MV78200,
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},
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{
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.compatible = "marvell,armadaxp-gpio",
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- .data = (void*) MVEBU_GPIO_SOC_VARIANT_ARMADAXP,
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+ .data = (void *) MVEBU_GPIO_SOC_VARIANT_ARMADAXP,
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},
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{
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/* sentinel */
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@@ -507,13 +507,13 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
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soc_variant = MVEBU_GPIO_SOC_VARIANT_ORION;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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- if (! res) {
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+ if (!res) {
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dev_err(&pdev->dev, "Cannot get memory resource\n");
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return -ENODEV;
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}
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mvchip = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_gpio_chip), GFP_KERNEL);
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- if (! mvchip){
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+ if (!mvchip) {
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dev_err(&pdev->dev, "Cannot allocate memory\n");
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return -ENOMEM;
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}
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@@ -553,21 +553,21 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
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* per-CPU registers */
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if (soc_variant == MVEBU_GPIO_SOC_VARIANT_ARMADAXP) {
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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- if (! res) {
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+ if (!res) {
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dev_err(&pdev->dev, "Cannot get memory resource\n");
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return -ENODEV;
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}
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mvchip->percpu_membase = devm_ioremap_resource(&pdev->dev,
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res);
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- if (IS_ERR(mvchip->percpu_membase))
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+ if (IS_ERR(mvchip->percpu_membase))
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return PTR_ERR(mvchip->percpu_membase);
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}
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/*
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* Mask and clear GPIO interrupts.
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*/
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- switch(soc_variant) {
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+ switch (soc_variant) {
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case MVEBU_GPIO_SOC_VARIANT_ORION:
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writel_relaxed(0, mvchip->membase + GPIO_EDGE_CAUSE_OFF);
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writel_relaxed(0, mvchip->membase + GPIO_EDGE_MASK_OFF);
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@@ -625,7 +625,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
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gc = irq_alloc_generic_chip("mvebu_gpio_irq", 2, mvchip->irqbase,
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mvchip->membase, handle_level_irq);
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- if (! gc) {
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+ if (!gc) {
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dev_err(&pdev->dev, "Cannot allocate generic irq_chip\n");
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return -ENOMEM;
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}
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