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@@ -60,6 +60,7 @@ static unsigned int fmax = 515633;
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* @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register
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* @pwrreg_powerup: power up value for MMCIPOWER register
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* @signal_direction: input/out direction of bus signals can be indicated
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+ * @pwrreg_clkgate: MMCIPOWER register must be used to gate the clock
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*/
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struct variant_data {
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unsigned int clkreg;
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@@ -72,6 +73,7 @@ struct variant_data {
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bool blksz_datactrl16;
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u32 pwrreg_powerup;
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bool signal_direction;
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+ bool pwrreg_clkgate;
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};
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static struct variant_data variant_arm = {
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@@ -96,6 +98,7 @@ static struct variant_data variant_u300 = {
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.sdio = true,
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.pwrreg_powerup = MCI_PWR_ON,
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.signal_direction = true,
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+ .pwrreg_clkgate = true,
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};
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static struct variant_data variant_nomadik = {
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@@ -107,6 +110,7 @@ static struct variant_data variant_nomadik = {
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.st_clkdiv = true,
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.pwrreg_powerup = MCI_PWR_ON,
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.signal_direction = true,
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+ .pwrreg_clkgate = true,
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};
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static struct variant_data variant_ux500 = {
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@@ -119,6 +123,7 @@ static struct variant_data variant_ux500 = {
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.st_clkdiv = true,
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.pwrreg_powerup = MCI_PWR_ON,
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.signal_direction = true,
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+ .pwrreg_clkgate = true,
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};
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static struct variant_data variant_ux500v2 = {
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@@ -132,6 +137,7 @@ static struct variant_data variant_ux500v2 = {
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.blksz_datactrl16 = true,
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.pwrreg_powerup = MCI_PWR_ON,
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.signal_direction = true,
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+ .pwrreg_clkgate = true,
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};
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/*
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@@ -1150,6 +1156,13 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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}
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}
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+ /*
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+ * If clock = 0 and the variant requires the MMCIPOWER to be used for
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+ * gating the clock, the MCI_PWR_ON bit is cleared.
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+ */
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+ if (!ios->clock && variant->pwrreg_clkgate)
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+ pwr &= ~MCI_PWR_ON;
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+
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spin_lock_irqsave(&host->lock, flags);
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mmci_set_clkreg(host, ios->clock);
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