|
@@ -129,7 +129,7 @@ static struct clk osc_32KHz = {
|
|
static int local_pll397_enable(struct clk *clk, int enable)
|
|
static int local_pll397_enable(struct clk *clk, int enable)
|
|
{
|
|
{
|
|
u32 reg;
|
|
u32 reg;
|
|
- unsigned long timeout = 1 + msecs_to_jiffies(10);
|
|
|
|
|
|
+ unsigned long timeout = jiffies + msecs_to_jiffies(10);
|
|
|
|
|
|
reg = __raw_readl(LPC32XX_CLKPWR_PLL397_CTRL);
|
|
reg = __raw_readl(LPC32XX_CLKPWR_PLL397_CTRL);
|
|
|
|
|
|
@@ -144,7 +144,7 @@ static int local_pll397_enable(struct clk *clk, int enable)
|
|
/* Wait for PLL397 lock */
|
|
/* Wait for PLL397 lock */
|
|
while (((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) &
|
|
while (((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) &
|
|
LPC32XX_CLKPWR_SYSCTRL_PLL397_STS) == 0) &&
|
|
LPC32XX_CLKPWR_SYSCTRL_PLL397_STS) == 0) &&
|
|
- (timeout > jiffies))
|
|
|
|
|
|
+ time_before(jiffies, timeout))
|
|
cpu_relax();
|
|
cpu_relax();
|
|
|
|
|
|
if ((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) &
|
|
if ((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) &
|
|
@@ -158,7 +158,7 @@ static int local_pll397_enable(struct clk *clk, int enable)
|
|
static int local_oscmain_enable(struct clk *clk, int enable)
|
|
static int local_oscmain_enable(struct clk *clk, int enable)
|
|
{
|
|
{
|
|
u32 reg;
|
|
u32 reg;
|
|
- unsigned long timeout = 1 + msecs_to_jiffies(10);
|
|
|
|
|
|
+ unsigned long timeout = jiffies + msecs_to_jiffies(10);
|
|
|
|
|
|
reg = __raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL);
|
|
reg = __raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL);
|
|
|
|
|
|
@@ -173,7 +173,7 @@ static int local_oscmain_enable(struct clk *clk, int enable)
|
|
/* Wait for main oscillator to start */
|
|
/* Wait for main oscillator to start */
|
|
while (((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) &
|
|
while (((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) &
|
|
LPC32XX_CLKPWR_MOSC_DISABLE) != 0) &&
|
|
LPC32XX_CLKPWR_MOSC_DISABLE) != 0) &&
|
|
- (timeout > jiffies))
|
|
|
|
|
|
+ time_before(jiffies, timeout))
|
|
cpu_relax();
|
|
cpu_relax();
|
|
|
|
|
|
if ((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) &
|
|
if ((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) &
|
|
@@ -385,7 +385,7 @@ static int local_usbpll_enable(struct clk *clk, int enable)
|
|
{
|
|
{
|
|
u32 reg;
|
|
u32 reg;
|
|
int ret = -ENODEV;
|
|
int ret = -ENODEV;
|
|
- unsigned long timeout = 1 + msecs_to_jiffies(10);
|
|
|
|
|
|
+ unsigned long timeout = jiffies + msecs_to_jiffies(10);
|
|
|
|
|
|
reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
|
|
reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
|
|
|
|
|
|
@@ -398,7 +398,7 @@ static int local_usbpll_enable(struct clk *clk, int enable)
|
|
__raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
|
|
__raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
|
|
|
|
|
|
/* Wait for PLL lock */
|
|
/* Wait for PLL lock */
|
|
- while ((timeout > jiffies) & (ret == -ENODEV)) {
|
|
|
|
|
|
+ while (time_before(jiffies, timeout) && (ret == -ENODEV)) {
|
|
reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
|
|
reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
|
|
if (reg & LPC32XX_CLKPWR_USBCTRL_PLL_STS)
|
|
if (reg & LPC32XX_CLKPWR_USBCTRL_PLL_STS)
|
|
ret = 0;
|
|
ret = 0;
|