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@@ -611,7 +611,7 @@ int iwl_txq_ctx_reset(struct iwl_priv *priv)
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*/
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*/
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void iwl_txq_ctx_stop(struct iwl_priv *priv)
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void iwl_txq_ctx_stop(struct iwl_priv *priv)
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{
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{
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- int txq_id;
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+ int ch;
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unsigned long flags;
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unsigned long flags;
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/* Turn off all Tx DMA fifos */
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/* Turn off all Tx DMA fifos */
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@@ -624,12 +624,11 @@ void iwl_txq_ctx_stop(struct iwl_priv *priv)
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priv->cfg->ops->lib->txq_set_sched(priv, 0);
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priv->cfg->ops->lib->txq_set_sched(priv, 0);
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/* Stop each Tx DMA channel, and wait for it to be idle */
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/* Stop each Tx DMA channel, and wait for it to be idle */
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- for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
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- iwl_write_direct32(priv,
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- FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 0x0);
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+ for (ch = 0; ch < priv->hw_params.dma_chnl_num; ch++) {
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+ iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0);
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iwl_poll_direct_bit(priv, FH_TSSR_TX_STATUS_REG,
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iwl_poll_direct_bit(priv, FH_TSSR_TX_STATUS_REG,
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- FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
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- (txq_id), 200);
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+ FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch),
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+ 200);
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}
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}
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iwl_release_nic_access(priv);
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iwl_release_nic_access(priv);
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spin_unlock_irqrestore(&priv->lock, flags);
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spin_unlock_irqrestore(&priv->lock, flags);
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