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@@ -172,7 +172,7 @@ static void ath9k_iowrite32(void *hw_priv, u32 val, u32 reg_offset)
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath_softc *sc = (struct ath_softc *) common->priv;
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- if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
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+ if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_ON) {
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unsigned long flags;
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spin_lock_irqsave(&sc->sc_serial_rw, flags);
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iowrite32(val, sc->mem + reg_offset);
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@@ -188,7 +188,7 @@ static unsigned int ath9k_ioread32(void *hw_priv, u32 reg_offset)
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struct ath_softc *sc = (struct ath_softc *) common->priv;
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u32 val;
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- if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
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+ if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_ON) {
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unsigned long flags;
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spin_lock_irqsave(&sc->sc_serial_rw, flags);
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val = ioread32(sc->mem + reg_offset);
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@@ -219,7 +219,7 @@ static unsigned int ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 cl
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unsigned long uninitialized_var(flags);
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u32 val;
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- if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
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+ if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_ON) {
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spin_lock_irqsave(&sc->sc_serial_rw, flags);
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val = __ath9k_reg_rmw(sc, reg_offset, set, clr);
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spin_unlock_irqrestore(&sc->sc_serial_rw, flags);
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