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@@ -878,12 +878,15 @@ void r600_pcie_gart_tlb_flush(struct radeon_device *rdev)
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u32 tmp;
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/* flush hdp cache so updates hit vram */
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- if ((rdev->family >= CHIP_RV770) && (rdev->family <= CHIP_RV740)) {
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+ if ((rdev->family >= CHIP_RV770) && (rdev->family <= CHIP_RV740) &&
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+ !(rdev->flags & RADEON_IS_AGP)) {
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void __iomem *ptr = (void *)rdev->gart.table.vram.ptr;
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u32 tmp;
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/* r7xx hw bug. write to HDP_DEBUG1 followed by fb read
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* rather than write to HDP_REG_COHERENCY_FLUSH_CNTL
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+ * This seems to cause problems on some AGP cards. Just use the old
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+ * method for them.
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*/
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WREG32(HDP_DEBUG1, 0);
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tmp = readl((void __iomem *)ptr);
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@@ -3485,10 +3488,12 @@ int r600_debugfs_mc_info_init(struct radeon_device *rdev)
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void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo)
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{
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/* r7xx hw bug. write to HDP_DEBUG1 followed by fb read
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- * rather than write to HDP_REG_COHERENCY_FLUSH_CNTL
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+ * rather than write to HDP_REG_COHERENCY_FLUSH_CNTL.
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+ * This seems to cause problems on some AGP cards. Just use the old
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+ * method for them.
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*/
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if ((rdev->family >= CHIP_RV770) && (rdev->family <= CHIP_RV740) &&
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- rdev->vram_scratch.ptr) {
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+ rdev->vram_scratch.ptr && !(rdev->flags & RADEON_IS_AGP)) {
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void __iomem *ptr = (void *)rdev->vram_scratch.ptr;
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u32 tmp;
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