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@@ -27,6 +27,7 @@
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#define MAX_TXCH 64
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#define MAX_RXCH 64
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+#define MAX_FLAGS 64
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static struct pasdma_status *dma_status;
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@@ -44,6 +45,7 @@ static struct pci_dev *dma_pdev;
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static DECLARE_BITMAP(txch_free, MAX_TXCH);
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static DECLARE_BITMAP(rxch_free, MAX_RXCH);
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+static DECLARE_BITMAP(flags_free, MAX_FLAGS);
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/* pasemi_read_iob_reg - read IOB register
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* @reg: Register to read (offset into PCI CFG space)
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@@ -374,6 +376,71 @@ void pasemi_dma_free_buf(struct pasemi_dmachan *chan, int size,
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}
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EXPORT_SYMBOL(pasemi_dma_free_buf);
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+/* pasemi_dma_alloc_flag - Allocate a flag (event) for channel syncronization
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+ *
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+ * Allocates a flag for use with channel syncronization (event descriptors).
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+ * Returns allocated flag (0-63), < 0 on error.
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+ */
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+int pasemi_dma_alloc_flag(void)
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+{
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+ int bit;
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+
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+retry:
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+ bit = find_next_bit(flags_free, MAX_FLAGS, 0);
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+ if (bit >= MAX_FLAGS)
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+ return -ENOSPC;
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+ if (!test_and_clear_bit(bit, flags_free))
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+ goto retry;
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+
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+ return bit;
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+}
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+EXPORT_SYMBOL(pasemi_dma_alloc_flag);
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+
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+
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+/* pasemi_dma_free_flag - Deallocates a flag (event)
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+ * @flag: Flag number to deallocate
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+ *
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+ * Frees up a flag so it can be reused for other purposes.
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+ */
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+void pasemi_dma_free_flag(int flag)
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+{
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+ BUG_ON(test_bit(flag, flags_free));
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+ BUG_ON(flag >= MAX_FLAGS);
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+ set_bit(flag, flags_free);
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+}
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+EXPORT_SYMBOL(pasemi_dma_free_flag);
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+
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+
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+/* pasemi_dma_set_flag - Sets a flag (event) to 1
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+ * @flag: Flag number to set active
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+ *
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+ * Sets the flag provided to 1.
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+ */
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+void pasemi_dma_set_flag(int flag)
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+{
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+ BUG_ON(flag >= MAX_FLAGS);
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+ if (flag < 32)
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+ pasemi_write_dma_reg(PAS_DMA_TXF_SFLG0, 1 << flag);
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+ else
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+ pasemi_write_dma_reg(PAS_DMA_TXF_SFLG1, 1 << flag);
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+}
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+EXPORT_SYMBOL(pasemi_dma_set_flag);
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+
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+/* pasemi_dma_clear_flag - Sets a flag (event) to 0
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+ * @flag: Flag number to set inactive
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+ *
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+ * Sets the flag provided to 0.
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+ */
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+void pasemi_dma_clear_flag(int flag)
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+{
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+ BUG_ON(flag >= MAX_FLAGS);
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+ if (flag < 32)
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+ pasemi_write_dma_reg(PAS_DMA_TXF_CFLG0, 1 << flag);
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+ else
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+ pasemi_write_dma_reg(PAS_DMA_TXF_CFLG1, 1 << flag);
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+}
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+EXPORT_SYMBOL(pasemi_dma_clear_flag);
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+
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static void *map_onedev(struct pci_dev *p, int index)
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{
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struct device_node *dn;
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@@ -508,6 +575,13 @@ int pasemi_dma_init(void)
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/* enable rx section */
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pasemi_write_dma_reg(PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
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+ for (i = 0; i < MAX_FLAGS; i++)
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+ __set_bit(i, flags_free);
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+
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+ /* clear all status flags */
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+ pasemi_write_dma_reg(PAS_DMA_TXF_CFLG0, 0xffffffff);
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+ pasemi_write_dma_reg(PAS_DMA_TXF_CFLG1, 0xffffffff);
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+
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printk(KERN_INFO "PA Semi PWRficient DMA library initialized "
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"(%d tx, %d rx channels)\n", num_txch, num_rxch);
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