ARM: pm: some ARMv7 requires a dsb in resume to ensure correctness · f35235a315 - Gogs

ARM: pm: some ARMv7 requires a dsb in resume to ensure correctness

Add a dsb after the isb to ensure that the previous writes to the
CP15 registers take effect before we enable the MMU.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Russell King 14 years ago

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f35235a315

1 changed files with 1 additions and 0 deletions

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arch/arm/mm/proc-v7.S
							 
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				@@ -255,6 +255,7 @@ ENTRY(cpu_v7_do_resume)
			
				 	mcr	p15, 0, r4, c10, c2, 0	@ write PRRR
			
				 	mcr	p15, 0, r5, c10, c2, 1	@ write NMRR
			
				 	isb
			
				+	dsb
			
				 	mov	r0, r9			@ control register
			
				 	mov	r2, r7, lsr #14		@ get TTB0 base
			
				 	mov	r2, r2, lsl #14