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@@ -536,9 +536,6 @@ static int davinci_spi_bufs_prep(struct spi_device *spi,
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* optimize for both flags staying cleared.
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*/
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- op_mode = SPIPC0_DIFUN_MASK
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- | SPIPC0_DOFUN_MASK
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- | SPIPC0_CLKFUN_MASK;
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if (!(spi->mode & SPI_NO_CS)) {
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pdata = davinci_spi->pdata;
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if (!pdata->chip_sel ||
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@@ -886,6 +883,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
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resource_size_t dma_tx_chan = SPI_NO_RESOURCE;
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resource_size_t dma_eventq = SPI_NO_RESOURCE;
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int i = 0, ret = 0;
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+ u32 spipc0;
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pdata = pdev->dev.platform_data;
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if (pdata == NULL) {
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@@ -1028,6 +1026,10 @@ static int davinci_spi_probe(struct platform_device *pdev)
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udelay(100);
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iowrite32(1, davinci_spi->base + SPIGCR0);
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+ /* Set up SPIPC0. CS and ENA init is done in davinci_spi_bufs_prep */
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+ spipc0 = SPIPC0_DIFUN_MASK | SPIPC0_DOFUN_MASK | SPIPC0_CLKFUN_MASK;
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+ iowrite32(spipc0, davinci_spi->base + SPIPC0);
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+
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/* initialize chip selects */
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if (pdata->chip_sel) {
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for (i = 0; i < pdata->num_chipselect; i++) {
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