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@@ -26,18 +26,18 @@
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#define __BITS4 (SI_TYPE_SIZE / 4)
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#define __ll_B (1L << (SI_TYPE_SIZE / 2))
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-#define __ll_lowpart(t) ((USItype) (t) % __ll_B)
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-#define __ll_highpart(t) ((USItype) (t) / __ll_B)
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+#define __ll_lowpart(t) ((u32) (t) % __ll_B)
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+#define __ll_highpart(t) ((u32) (t) / __ll_B)
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/* Define auxiliary asm macros.
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1) umul_ppmm(high_prod, low_prod, multipler, multiplicand)
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- multiplies two USItype integers MULTIPLER and MULTIPLICAND,
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- and generates a two-part USItype product in HIGH_PROD and
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+ multiplies two u32 integers MULTIPLER and MULTIPLICAND,
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+ and generates a two-part u32 product in HIGH_PROD and
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LOW_PROD.
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- 2) __umulsidi3(a,b) multiplies two USItype integers A and B,
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- and returns a UDItype product. This is just a variant of umul_ppmm.
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+ 2) __umulsidi3(a,b) multiplies two u32 integers A and B,
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+ and returns a u64 product. This is just a variant of umul_ppmm.
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3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
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denominator) divides a two-word unsigned integer, composed by the
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@@ -77,23 +77,23 @@
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#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
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__asm__ ("adds %1, %4, %5 \n\
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adc %0, %2, %3" \
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- : "=r" ((USItype) (sh)), \
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- "=&r" ((USItype) (sl)) \
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- : "%r" ((USItype) (ah)), \
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- "rI" ((USItype) (bh)), \
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- "%r" ((USItype) (al)), \
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- "rI" ((USItype) (bl)))
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+ : "=r" ((u32) (sh)), \
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+ "=&r" ((u32) (sl)) \
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+ : "%r" ((u32) (ah)), \
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+ "rI" ((u32) (bh)), \
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+ "%r" ((u32) (al)), \
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+ "rI" ((u32) (bl)))
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#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
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__asm__ ("subs %1, %4, %5 \n\
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sbc %0, %2, %3" \
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- : "=r" ((USItype) (sh)), \
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- "=&r" ((USItype) (sl)) \
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- : "r" ((USItype) (ah)), \
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- "rI" ((USItype) (bh)), \
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- "r" ((USItype) (al)), \
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- "rI" ((USItype) (bl)))
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+ : "=r" ((u32) (sh)), \
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+ "=&r" ((u32) (sl)) \
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+ : "r" ((u32) (ah)), \
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+ "rI" ((u32) (bh)), \
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+ "r" ((u32) (al)), \
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+ "rI" ((u32) (bl)))
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#define umul_ppmm(xh, xl, a, b) \
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-{register USItype __t0, __t1, __t2; \
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+{register u32 __t0, __t1, __t2; \
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__asm__ ("%@ Inlined umul_ppmm \n\
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mov %2, %5, lsr #16 \n\
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mov %0, %6, lsr #16 \n\
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@@ -107,11 +107,11 @@
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addcs %0, %0, #65536 \n\
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adds %1, %1, %3, lsl #16 \n\
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adc %0, %0, %3, lsr #16" \
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- : "=&r" ((USItype) (xh)), \
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- "=r" ((USItype) (xl)), \
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+ : "=&r" ((u32) (xh)), \
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+ "=r" ((u32) (xl)), \
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"=&r" (__t0), "=&r" (__t1), "=r" (__t2) \
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- : "r" ((USItype) (a)), \
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- "r" ((USItype) (b)));}
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+ : "r" ((u32) (a)), \
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+ "r" ((u32) (b)));}
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#define UMUL_TIME 20
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#define UDIV_TIME 100
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#endif /* __arm__ */
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@@ -123,14 +123,14 @@
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#define __udiv_qrnnd_c(q, r, n1, n0, d) \
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do { \
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- USItype __d1, __d0, __q1, __q0; \
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- USItype __r1, __r0, __m; \
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+ u32 __d1, __d0, __q1, __q0; \
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+ u32 __r1, __r0, __m; \
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__d1 = __ll_highpart (d); \
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__d0 = __ll_lowpart (d); \
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\
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__r1 = (n1) % __d1; \
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__q1 = (n1) / __d1; \
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- __m = (USItype) __q1 * __d0; \
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+ __m = (u32) __q1 * __d0; \
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__r1 = __r1 * __ll_B | __ll_highpart (n0); \
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if (__r1 < __m) \
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{ \
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@@ -143,7 +143,7 @@
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\
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__r0 = __r1 % __d1; \
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__q0 = __r1 / __d1; \
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- __m = (USItype) __q0 * __d0; \
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+ __m = (u32) __q0 * __d0; \
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__r0 = __r0 * __ll_B | __ll_lowpart (n0); \
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if (__r0 < __m) \
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{ \
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@@ -154,7 +154,7 @@
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} \
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__r0 -= __m; \
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\
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- (q) = (USItype) __q1 * __ll_B | __q0; \
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+ (q) = (u32) __q1 * __ll_B | __q0; \
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(r) = __r0; \
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} while (0)
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@@ -163,14 +163,14 @@
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#define count_leading_zeros(count, x) \
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do { \
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- USItype __xr = (x); \
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- USItype __a; \
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+ u32 __xr = (x); \
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+ u32 __a; \
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\
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if (SI_TYPE_SIZE <= 32) \
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{ \
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- __a = __xr < ((USItype)1<<2*__BITS4) \
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- ? (__xr < ((USItype)1<<__BITS4) ? 0 : __BITS4) \
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- : (__xr < ((USItype)1<<3*__BITS4) ? 2*__BITS4 : 3*__BITS4); \
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+ __a = __xr < ((u32)1<<2*__BITS4) \
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+ ? (__xr < ((u32)1<<__BITS4) ? 0 : __BITS4) \
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+ : (__xr < ((u32)1<<3*__BITS4) ? 2*__BITS4 : 3*__BITS4); \
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} \
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else \
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{ \
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