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@@ -2595,7 +2595,7 @@ static void dispc_mgr_disable_isr(void *data, u32 mask)
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complete(compl);
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}
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-static void _enable_mgr_out(enum omap_channel channel, bool enable)
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+void dispc_mgr_enable(enum omap_channel channel, bool enable)
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{
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mgr_fld_write(channel, DISPC_MGR_FLD_ENABLE, enable);
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/* flush posted write */
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@@ -2609,7 +2609,7 @@ bool dispc_mgr_is_enabled(enum omap_channel channel)
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static void dispc_mgr_enable_lcd_out(enum omap_channel channel)
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{
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- _enable_mgr_out(channel, true);
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+ dispc_mgr_enable(channel, true);
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}
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static void dispc_mgr_disable_lcd_out(enum omap_channel channel)
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@@ -2633,7 +2633,7 @@ static void dispc_mgr_disable_lcd_out(enum omap_channel channel)
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if (r)
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DSSERR("failed to register FRAMEDONE isr\n");
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- _enable_mgr_out(channel, false);
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+ dispc_mgr_enable(channel, false);
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/* if we couldn't register for framedone, just sleep and exit */
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if (r) {
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@@ -2685,7 +2685,7 @@ static void dispc_mgr_enable_digit_out(void)
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return;
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}
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- _enable_mgr_out(OMAP_DSS_CHANNEL_DIGIT, true);
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+ dispc_mgr_enable(OMAP_DSS_CHANNEL_DIGIT, true);
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/* wait for the first evsync */
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if (!wait_for_completion_timeout(&vsync_compl, msecs_to_jiffies(100)))
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@@ -2735,7 +2735,7 @@ static void dispc_mgr_disable_digit_out(void)
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if (r)
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DSSERR("failed to register %x isr\n", irq_mask);
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- _enable_mgr_out(OMAP_DSS_CHANNEL_DIGIT, false);
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+ dispc_mgr_enable(OMAP_DSS_CHANNEL_DIGIT, false);
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/* if we couldn't register the irq, just sleep and exit */
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if (r) {
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