|
@@ -784,13 +784,25 @@ static void ath9k_hw_init_qos(struct ath_hw *ah)
|
|
|
|
|
|
u32 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah)
|
|
|
{
|
|
|
+ struct ath_common *common = ath9k_hw_common(ah);
|
|
|
+ int i = 0;
|
|
|
+
|
|
|
REG_CLR_BIT(ah, PLL3, PLL3_DO_MEAS_MASK);
|
|
|
udelay(100);
|
|
|
REG_SET_BIT(ah, PLL3, PLL3_DO_MEAS_MASK);
|
|
|
|
|
|
- while ((REG_READ(ah, PLL4) & PLL4_MEAS_DONE) == 0)
|
|
|
+ while ((REG_READ(ah, PLL4) & PLL4_MEAS_DONE) == 0) {
|
|
|
+
|
|
|
udelay(100);
|
|
|
|
|
|
+ if (WARN_ON_ONCE(i >= 100)) {
|
|
|
+ ath_err(common, "PLL4 meaurement not done\n");
|
|
|
+ break;
|
|
|
+ }
|
|
|
+
|
|
|
+ i++;
|
|
|
+ }
|
|
|
+
|
|
|
return (REG_READ(ah, PLL3) & SQSUM_DVC_MASK) >> 3;
|
|
|
}
|
|
|
EXPORT_SYMBOL(ar9003_get_pll_sqsum_dvc);
|