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@@ -68,14 +68,13 @@
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#define __HEXAGON_C_WB 0x0 /* Write-back, no L2 */
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#define __HEXAGON_C_WT 0x1 /* Write-through, no L2 */
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+#define __HEXAGON_C_UNC 0x6 /* Uncached memory */
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+#if CONFIG_HEXAGON_ARCH_VERSION >= 2
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#define __HEXAGON_C_DEV 0x4 /* Device register space */
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-#define __HEXAGON_C_WT_L2 0x5 /* Write-through, with L2 */
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-/* this really should be #if CONFIG_HEXAGON_ARCH = 2 but that's not defined */
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-#if defined(CONFIG_HEXAGON_COMET) || defined(CONFIG_QDSP6_ST1)
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-#define __HEXAGON_C_UNC __HEXAGON_C_DEV
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#else
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-#define __HEXAGON_C_UNC 0x6 /* Uncached memory */
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+#define __HEXAGON_C_DEV __HEXAGON_C_UNC
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#endif
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+#define __HEXAGON_C_WT_L2 0x5 /* Write-through, with L2 */
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#define __HEXAGON_C_WB_L2 0x7 /* Write-back, with L2 */
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/*
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