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@@ -48,8 +48,6 @@ struct pcie_link_state {
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u32 clkpm_enabled:1; /* Current Clock PM state */
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u32 clkpm_default:1; /* Default Clock PM state by BIOS */
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- u32 has_switch:1; /* Downstream has switches? */
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-
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/* Latencies */
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struct aspm_latency latency; /* Exit latency */
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/*
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@@ -595,7 +593,6 @@ static struct pcie_link_state *pcie_aspm_setup_link_state(struct pci_dev *pdev)
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INIT_LIST_HEAD(&link->children);
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INIT_LIST_HEAD(&link->link);
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link->pdev = pdev;
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- link->has_switch = pcie_aspm_downstream_has_switch(link);
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if (pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM) {
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struct pcie_link_state *parent;
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parent = pdev->bus->parent->self->link_state;
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@@ -655,7 +652,7 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev)
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* initialization will config the whole hierarchy. But we must
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* make sure BIOS doesn't set unsupported link state.
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*/
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- if (link->has_switch) {
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+ if (pcie_aspm_downstream_has_switch(link)) {
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state = pcie_aspm_check_state(link, link->aspm_default);
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__pcie_aspm_config_link(link, state);
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} else {
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