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+/*
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+ * TI DaVinci GPIO Support
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+ *
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+ * Copyright (c) 2006 David Brownell
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+ * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ */
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+
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+#ifndef __DAVINCI_DAVINCI_GPIO_H
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+#define __DAVINCI_DAVINCI_GPIO_H
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+
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+#include <linux/io.h>
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+#include <linux/spinlock.h>
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+
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+#include <asm-generic/gpio.h>
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+
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+#include <mach/irqs.h>
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+#include <mach/common.h>
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+
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+#define DAVINCI_GPIO_BASE 0x01C67000
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+
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+enum davinci_gpio_type {
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+ GPIO_TYPE_DAVINCI = 0,
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+ GPIO_TYPE_TNETV107X,
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+};
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+
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+/*
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+ * basic gpio routines
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+ *
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+ * board-specific init should be done by arch/.../.../board-XXX.c (maybe
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+ * initializing banks together) rather than boot loaders; kexec() won't
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+ * go through boot loaders.
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+ *
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+ * the gpio clock will be turned on when gpios are used, and you may also
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+ * need to pay attention to PINMUX registers to be sure those pins are
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+ * used as gpios, not with other peripherals.
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+ *
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+ * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation,
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+ * and maybe for later updates, code may write GPIO(N). These may be
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+ * all 1.8V signals, all 3.3V ones, or a mix of the two. A given chip
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+ * may not support all the GPIOs in that range.
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+ *
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+ * GPIOs can also be on external chips, numbered after the ones built-in
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+ * to the DaVinci chip. For now, they won't be usable as IRQ sources.
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+ */
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+#define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
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+
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+/* Convert GPIO signal to GPIO pin number */
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+#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
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+
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+struct davinci_gpio_controller {
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+ struct gpio_chip chip;
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+ int irq_base;
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+ spinlock_t lock;
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+ void __iomem *regs;
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+ void __iomem *set_data;
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+ void __iomem *clr_data;
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+ void __iomem *in_data;
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+};
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+
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+/* The __gpio_to_controller() and __gpio_mask() functions inline to constants
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+ * with constant parameters; or in outlined code they execute at runtime.
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+ *
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+ * You'd access the controller directly when reading or writing more than
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+ * one gpio value at a time, and to support wired logic where the value
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+ * being driven by the cpu need not match the value read back.
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+ *
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+ * These are NOT part of the cross-platform GPIO interface
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+ */
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+static inline struct davinci_gpio_controller *
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+__gpio_to_controller(unsigned gpio)
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+{
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+ struct davinci_gpio_controller *ctlrs = davinci_soc_info.gpio_ctlrs;
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+ int index = gpio / 32;
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+
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+ if (!ctlrs || index >= davinci_soc_info.gpio_ctlrs_num)
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+ return NULL;
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+
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+ return ctlrs + index;
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+}
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+
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+static inline u32 __gpio_mask(unsigned gpio)
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+{
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+ return 1 << (gpio % 32);
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+}
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+
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+#endif /* __DAVINCI_DAVINCI_GPIO_H */
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