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@@ -549,7 +549,6 @@ static void get_samsung_nand_para(struct denali_nand_info *denali)
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static void get_toshiba_nand_para(struct denali_nand_info *denali)
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{
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- void __iomem *scratch_reg;
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uint32_t tmp;
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/* Workaround to fix a controller bug which reports a wrong */
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@@ -567,33 +566,14 @@ static void get_toshiba_nand_para(struct denali_nand_info *denali)
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denali_write32(8, denali->flash_reg + ECC_CORRECTION);
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#endif
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}
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-
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- /* As Toshiba NAND can not provide it's block number, */
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- /* so here we need user to provide the correct block */
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- /* number in a scratch register before the Linux NAND */
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- /* driver is loaded. If no valid value found in the scratch */
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- /* register, then we use default block number value */
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- scratch_reg = ioremap_nocache(SCRATCH_REG_ADDR, SCRATCH_REG_SIZE);
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- if (!scratch_reg) {
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- printk(KERN_ERR "Spectra: ioremap failed in %s, Line %d",
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- __FILE__, __LINE__);
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- denali->dev_info.wTotalBlocks = GLOB_HWCTL_DEFAULT_BLKS;
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- } else {
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- nand_dbg_print(NAND_DBG_WARN,
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- "Spectra: ioremap reg address: 0x%p\n", scratch_reg);
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- denali->dev_info.wTotalBlocks = 1 << ioread8(scratch_reg);
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- if (denali->dev_info.wTotalBlocks < 512)
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- denali->dev_info.wTotalBlocks = GLOB_HWCTL_DEFAULT_BLKS;
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- iounmap(scratch_reg);
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- }
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}
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-static void get_hynix_nand_para(struct denali_nand_info *denali)
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+static void get_hynix_nand_para(struct denali_nand_info *denali,
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+ uint8_t device_id)
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{
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- void __iomem *scratch_reg;
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uint32_t main_size, spare_size;
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- switch (denali->dev_info.wDeviceID) {
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+ switch (device_id) {
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case 0xD5: /* Hynix H27UAG8T2A, H27UBG8U5A or H27UCG8VFA */
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case 0xD7: /* Hynix H27UDG8VEM, H27UCG8UDM or H27UCG8V5A */
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denali_write32(128, denali->flash_reg + PAGES_PER_BLOCK);
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@@ -621,20 +601,6 @@ static void get_hynix_nand_para(struct denali_nand_info *denali)
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"Will use default parameter values instead.\n",
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denali->dev_info.wDeviceID);
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}
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-
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- scratch_reg = ioremap_nocache(SCRATCH_REG_ADDR, SCRATCH_REG_SIZE);
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- if (!scratch_reg) {
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- printk(KERN_ERR "Spectra: ioremap failed in %s, Line %d",
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- __FILE__, __LINE__);
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- denali->dev_info.wTotalBlocks = GLOB_HWCTL_DEFAULT_BLKS;
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- } else {
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- nand_dbg_print(NAND_DBG_WARN,
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- "Spectra: ioremap reg address: 0x%p\n", scratch_reg);
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- denali->dev_info.wTotalBlocks = 1 << ioread8(scratch_reg);
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- if (denali->dev_info.wTotalBlocks < 512)
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- denali->dev_info.wTotalBlocks = GLOB_HWCTL_DEFAULT_BLKS;
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- iounmap(scratch_reg);
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- }
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}
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/* determines how many NAND chips are connected to the controller. Note for
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@@ -807,34 +773,35 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
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{
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uint16_t status = PASS;
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uint8_t no_of_planes;
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+ uint32_t id_bytes[5], addr;
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+ uint8_t i, maf_id, device_id;
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nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
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__FILE__, __LINE__, __func__);
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- denali->dev_info.wDeviceMaker =
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- ioread32(denali->flash_reg + MANUFACTURER_ID);
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- denali->dev_info.wDeviceID =
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- ioread32(denali->flash_reg + DEVICE_ID);
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- denali->dev_info.bDeviceParam0 =
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- ioread32(denali->flash_reg + DEVICE_PARAM_0);
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- denali->dev_info.bDeviceParam1 =
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- ioread32(denali->flash_reg + DEVICE_PARAM_1);
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- denali->dev_info.bDeviceParam2 =
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- ioread32(denali->flash_reg + DEVICE_PARAM_2);
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-
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- denali->dev_info.MLCDevice =
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- ioread32(denali->flash_reg + DEVICE_PARAM_0) & 0x0c;
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+ /* Use read id method to get device ID and other
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+ * params. For some NAND chips, controller can't
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+ * report the correct device ID by reading from
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+ * DEVICE_ID register
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+ * */
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+ addr = (uint32_t)MODE_11 | BANK(denali->flash_bank);
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+ index_addr(denali, (uint32_t)addr | 0, 0x90);
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+ index_addr(denali, (uint32_t)addr | 1, 0);
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+ for (i = 0; i < 5; i++)
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+ index_addr_read_data(denali, addr | 2, &id_bytes[i]);
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+ maf_id = id_bytes[0];
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+ device_id = id_bytes[1];
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if (ioread32(denali->flash_reg + ONFI_DEVICE_NO_OF_LUNS) &
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ONFI_DEVICE_NO_OF_LUNS__ONFI_DEVICE) { /* ONFI 1.0 NAND */
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if (FAIL == get_onfi_nand_para(denali))
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return FAIL;
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- } else if (denali->dev_info.wDeviceMaker == 0xEC) { /* Samsung NAND */
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+ } else if (maf_id == 0xEC) { /* Samsung NAND */
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get_samsung_nand_para(denali);
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- } else if (denali->dev_info.wDeviceMaker == 0x98) { /* Toshiba NAND */
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+ } else if (maf_id == 0x98) { /* Toshiba NAND */
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get_toshiba_nand_para(denali);
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- } else if (denali->dev_info.wDeviceMaker == 0xAD) { /* Hynix NAND */
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- get_hynix_nand_para(denali);
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+ } else if (maf_id == 0xAD) { /* Hynix NAND */
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+ get_hynix_nand_para(denali, device_id);
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} else {
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denali->dev_info.wTotalBlocks = GLOB_HWCTL_DEFAULT_BLKS;
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}
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@@ -1720,6 +1687,8 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
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int page)
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{
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struct denali_nand_info *denali = mtd_to_denali(mtd);
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+ uint32_t addr, id;
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+ int i;
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#if DEBUG_DENALI
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printk(KERN_INFO "cmdfunc: 0x%x %d %d\n", cmd, col, page);
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@@ -1732,24 +1701,18 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
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break;
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case NAND_CMD_READID:
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reset_buf(denali);
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- if (denali->flash_bank < denali->total_used_banks) {
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- /* write manufacturer information into nand
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- buffer for NAND subsystem to fetch.
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- */
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- write_byte_to_buf(denali,
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- denali->dev_info.wDeviceMaker);
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- write_byte_to_buf(denali,
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- denali->dev_info.wDeviceID);
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- write_byte_to_buf(denali,
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- denali->dev_info.bDeviceParam0);
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- write_byte_to_buf(denali,
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- denali->dev_info.bDeviceParam1);
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- write_byte_to_buf(denali,
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- denali->dev_info.bDeviceParam2);
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- } else {
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- int i;
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- for (i = 0; i < 5; i++)
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- write_byte_to_buf(denali, 0xff);
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+ /*sometimes ManufactureId read from register is not right
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+ * e.g. some of Micron MT29F32G08QAA MLC NAND chips
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+ * So here we send READID cmd to NAND insteand
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+ * */
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+ addr = (uint32_t)MODE_11 | BANK(denali->flash_bank);
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+ index_addr(denali, (uint32_t)addr | 0, 0x90);
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+ index_addr(denali, (uint32_t)addr | 1, 0);
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+ for (i = 0; i < 5; i++) {
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+ index_addr_read_data(denali,
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+ (uint32_t)addr | 2,
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+ &id);
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+ write_byte_to_buf(denali, id);
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}
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break;
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case NAND_CMD_READ0:
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