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@@ -26,6 +26,9 @@
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#include <linux/spi/eeprom.h>
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#include <linux/irq.h>
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#include <linux/gpio.h>
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+#include <linux/usb/otg.h>
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+#include <linux/usb/ulpi.h>
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+#include <linux/fsl_devices.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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@@ -41,9 +44,14 @@
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#include <mach/mxc_nand.h>
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#include <mach/irqs.h>
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#include <mach/mmc.h>
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+#include <mach/mxc_ehci.h>
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+#include <mach/ulpi.h>
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#include "devices.h"
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+#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
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+#define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
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+
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static int pca100_pins[] = {
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/* UART1 */
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PE12_PF_UART1_TXD,
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@@ -92,6 +100,34 @@ static int pca100_pins[] = {
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PD29_PF_CSPI1_SCLK,
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PD30_PF_CSPI1_MISO,
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PD31_PF_CSPI1_MOSI,
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+ /* OTG */
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+ OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
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+ PC7_PF_USBOTG_DATA5,
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+ PC8_PF_USBOTG_DATA6,
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+ PC9_PF_USBOTG_DATA0,
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+ PC10_PF_USBOTG_DATA2,
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+ PC11_PF_USBOTG_DATA1,
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+ PC12_PF_USBOTG_DATA4,
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+ PC13_PF_USBOTG_DATA3,
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+ PE0_PF_USBOTG_NXT,
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+ PE1_PF_USBOTG_STP,
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+ PE2_PF_USBOTG_DIR,
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+ PE24_PF_USBOTG_CLK,
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+ PE25_PF_USBOTG_DATA7,
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+ /* USBH2 */
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+ USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
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+ PA0_PF_USBH2_CLK,
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+ PA1_PF_USBH2_DIR,
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+ PA2_PF_USBH2_DATA7,
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+ PA3_PF_USBH2_NXT,
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+ PA4_PF_USBH2_STP,
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+ PD19_AF_USBH2_DATA4,
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+ PD20_AF_USBH2_DATA3,
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+ PD21_AF_USBH2_DATA6,
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+ PD22_AF_USBH2_DATA0,
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+ PD23_AF_USBH2_DATA2,
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+ PD24_AF_USBH2_DATA1,
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+ PD26_AF_USBH2_DATA5,
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};
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static struct imxuart_platform_data uart_pdata = {
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@@ -182,6 +218,50 @@ static struct imxmmc_platform_data sdhc_pdata = {
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.exit = pca100_sdhc2_exit,
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};
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+static int otg_phy_init(struct platform_device *pdev)
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+{
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+ gpio_set_value(OTG_PHY_CS_GPIO, 0);
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+ return 0;
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+}
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+
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+static struct mxc_usbh_platform_data otg_pdata = {
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+ .init = otg_phy_init,
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+ .portsc = MXC_EHCI_MODE_ULPI,
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+ .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
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+};
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+
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+static int usbh2_phy_init(struct platform_device *pdev)
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+{
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+ gpio_set_value(USBH2_PHY_CS_GPIO, 0);
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+ return 0;
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+}
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+
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+static struct mxc_usbh_platform_data usbh2_pdata = {
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+ .init = usbh2_phy_init,
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+ .portsc = MXC_EHCI_MODE_ULPI,
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+ .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
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+};
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+
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+static struct fsl_usb2_platform_data otg_device_pdata = {
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+ .operating_mode = FSL_USB2_DR_DEVICE,
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+ .phy_mode = FSL_USB2_PHY_ULPI,
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+};
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+
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+static int otg_mode_host;
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+
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+static int __init pca100_otg_mode(char *options)
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+{
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+ if (!strcmp(options, "host"))
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+ otg_mode_host = 1;
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+ else if (!strcmp(options, "device"))
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+ otg_mode_host = 0;
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+ else
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+ pr_info("otg_mode neither \"host\" nor \"device\". "
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+ "Defaulting to device\n");
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+ return 0;
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+}
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+__setup("otg_mode=", pca100_otg_mode);
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+
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static void __init pca100_init(void)
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{
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int ret;
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@@ -220,6 +300,29 @@ static void __init pca100_init(void)
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mxc_register_device(&mxc_spi_device0, &pca100_spi_0_data);
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#endif
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+ gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
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+ gpio_direction_output(OTG_PHY_CS_GPIO, 1);
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+ gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
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+ gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
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+
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+#if defined(CONFIG_USB_ULPI)
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+ if (otg_mode_host) {
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+ otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
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+ USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
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+
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+ mxc_register_device(&mxc_otg_host, &otg_pdata);
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+ }
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+
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+ usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
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+ USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
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+
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+ mxc_register_device(&mxc_usbh2, &usbh2_pdata);
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+#endif
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+ if (!otg_mode_host) {
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+ gpio_set_value(OTG_PHY_CS_GPIO, 0);
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+ mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
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+ }
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+
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platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
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}
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