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@@ -9,6 +9,8 @@
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* option) any later version.
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* option) any later version.
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*/
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*/
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+/dts-v1/;
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+
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/ {
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/ {
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model = "MPC8349EMDS";
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model = "MPC8349EMDS";
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compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
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compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
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@@ -31,10 +33,10 @@
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PowerPC,8349@0 {
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PowerPC,8349@0 {
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device_type = "cpu";
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device_type = "cpu";
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reg = <0>;
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reg = <0>;
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- d-cache-line-size = <20>; // 32 bytes
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- i-cache-line-size = <20>; // 32 bytes
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- d-cache-size = <8000>; // L1, 32K
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- i-cache-size = <8000>; // L1, 32K
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+ d-cache-line-size = <32>;
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+ i-cache-line-size = <32>;
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+ d-cache-size = <32768>;
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+ i-cache-size = <32768>;
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timebase-frequency = <0>; // from bootloader
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timebase-frequency = <0>; // from bootloader
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bus-frequency = <0>; // from bootloader
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bus-frequency = <0>; // from bootloader
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clock-frequency = <0>; // from bootloader
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clock-frequency = <0>; // from bootloader
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@@ -43,26 +45,26 @@
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memory {
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memory {
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device_type = "memory";
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device_type = "memory";
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- reg = <00000000 10000000>; // 256MB at 0
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+ reg = <0x00000000 0x10000000>; // 256MB at 0
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};
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};
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bcsr@e2400000 {
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bcsr@e2400000 {
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device_type = "board-control";
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device_type = "board-control";
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- reg = <e2400000 8000>;
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+ reg = <0xe2400000 0x8000>;
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};
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};
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soc8349@e0000000 {
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soc8349@e0000000 {
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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device_type = "soc";
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- ranges = <0 e0000000 00100000>;
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- reg = <e0000000 00000200>;
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+ ranges = <0x0 0xe0000000 0x00100000>;
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+ reg = <0xe0000000 0x00000200>;
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bus-frequency = <0>;
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bus-frequency = <0>;
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wdt@200 {
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wdt@200 {
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device_type = "watchdog";
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device_type = "watchdog";
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compatible = "mpc83xx_wdt";
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compatible = "mpc83xx_wdt";
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- reg = <200 100>;
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+ reg = <0x200 0x100>;
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};
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};
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i2c@3000 {
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i2c@3000 {
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@@ -70,14 +72,14 @@
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#size-cells = <0>;
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#size-cells = <0>;
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cell-index = <0>;
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cell-index = <0>;
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compatible = "fsl-i2c";
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compatible = "fsl-i2c";
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- reg = <3000 100>;
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- interrupts = <e 8>;
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- interrupt-parent = < &ipic >;
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+ reg = <0x3000 0x100>;
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+ interrupts = <14 8>;
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+ interrupt-parent = <&ipic>;
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dfsrr;
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dfsrr;
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rtc@68 {
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rtc@68 {
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compatible = "dallas,ds1374";
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compatible = "dallas,ds1374";
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- reg = <68>;
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+ reg = <0x68>;
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};
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};
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};
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};
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@@ -86,41 +88,41 @@
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#size-cells = <0>;
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#size-cells = <0>;
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cell-index = <1>;
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cell-index = <1>;
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compatible = "fsl-i2c";
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compatible = "fsl-i2c";
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- reg = <3100 100>;
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- interrupts = <f 8>;
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- interrupt-parent = < &ipic >;
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+ reg = <0x3100 0x100>;
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+ interrupts = <15 8>;
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+ interrupt-parent = <&ipic>;
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dfsrr;
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dfsrr;
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};
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};
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spi@7000 {
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spi@7000 {
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device_type = "spi";
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device_type = "spi";
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compatible = "fsl_spi";
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compatible = "fsl_spi";
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- reg = <7000 1000>;
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- interrupts = <10 8>;
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- interrupt-parent = < &ipic >;
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+ reg = <0x7000 0x1000>;
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+ interrupts = <16 8>;
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+ interrupt-parent = <&ipic>;
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mode = "cpu";
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mode = "cpu";
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};
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};
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- /* phy type (ULPI or SERIAL) are only types supportted for MPH */
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+ /* phy type (ULPI or SERIAL) are only types supported for MPH */
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/* port = 0 or 1 */
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/* port = 0 or 1 */
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usb@22000 {
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usb@22000 {
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compatible = "fsl-usb2-mph";
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compatible = "fsl-usb2-mph";
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- reg = <22000 1000>;
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+ reg = <0x22000 0x1000>;
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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#size-cells = <0>;
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- interrupt-parent = < &ipic >;
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- interrupts = <27 8>;
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+ interrupt-parent = <&ipic>;
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+ interrupts = <39 8>;
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phy_type = "ulpi";
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phy_type = "ulpi";
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port1;
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port1;
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};
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};
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/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
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/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
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usb@23000 {
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usb@23000 {
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compatible = "fsl-usb2-dr";
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compatible = "fsl-usb2-dr";
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- reg = <23000 1000>;
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+ reg = <0x23000 0x1000>;
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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#size-cells = <0>;
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- interrupt-parent = < &ipic >;
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- interrupts = <26 8>;
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+ interrupt-parent = <&ipic>;
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+ interrupts = <38 8>;
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dr_mode = "otg";
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dr_mode = "otg";
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phy_type = "ulpi";
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phy_type = "ulpi";
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};
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};
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@@ -129,18 +131,18 @@
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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#size-cells = <0>;
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compatible = "fsl,gianfar-mdio";
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compatible = "fsl,gianfar-mdio";
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- reg = <24520 20>;
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+ reg = <0x24520 0x20>;
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phy0: ethernet-phy@0 {
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phy0: ethernet-phy@0 {
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- interrupt-parent = < &ipic >;
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- interrupts = <11 8>;
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- reg = <0>;
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+ interrupt-parent = <&ipic>;
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+ interrupts = <17 8>;
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+ reg = <0x0>;
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device_type = "ethernet-phy";
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device_type = "ethernet-phy";
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};
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};
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phy1: ethernet-phy@1 {
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phy1: ethernet-phy@1 {
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- interrupt-parent = < &ipic >;
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- interrupts = <12 8>;
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- reg = <1>;
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+ interrupt-parent = <&ipic>;
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+ interrupts = <18 8>;
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+ reg = <0x1>;
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device_type = "ethernet-phy";
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device_type = "ethernet-phy";
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};
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};
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};
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};
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@@ -150,11 +152,11 @@
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device_type = "network";
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device_type = "network";
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model = "TSEC";
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model = "TSEC";
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compatible = "gianfar";
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compatible = "gianfar";
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- reg = <24000 1000>;
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+ reg = <0x24000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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local-mac-address = [ 00 00 00 00 00 00 ];
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- interrupts = <20 8 21 8 22 8>;
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- interrupt-parent = < &ipic >;
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- phy-handle = < &phy0 >;
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+ interrupts = <32 8 33 8 34 8>;
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+ interrupt-parent = <&ipic>;
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+ phy-handle = <&phy0>;
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linux,network-index = <0>;
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linux,network-index = <0>;
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};
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};
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@@ -163,11 +165,11 @@
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device_type = "network";
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device_type = "network";
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model = "TSEC";
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model = "TSEC";
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compatible = "gianfar";
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compatible = "gianfar";
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- reg = <25000 1000>;
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+ reg = <0x25000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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local-mac-address = [ 00 00 00 00 00 00 ];
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- interrupts = <23 8 24 8 25 8>;
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- interrupt-parent = < &ipic >;
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- phy-handle = < &phy1 >;
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+ interrupts = <35 8 36 8 37 8>;
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+ interrupt-parent = <&ipic>;
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+ phy-handle = <&phy1>;
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linux,network-index = <1>;
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linux,network-index = <1>;
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};
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};
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@@ -175,20 +177,20 @@
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cell-index = <0>;
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cell-index = <0>;
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device_type = "serial";
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device_type = "serial";
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compatible = "ns16550";
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compatible = "ns16550";
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- reg = <4500 100>;
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+ reg = <0x4500 0x100>;
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clock-frequency = <0>;
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clock-frequency = <0>;
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interrupts = <9 8>;
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interrupts = <9 8>;
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- interrupt-parent = < &ipic >;
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+ interrupt-parent = <&ipic>;
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};
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};
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serial1: serial@4600 {
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serial1: serial@4600 {
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cell-index = <1>;
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cell-index = <1>;
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device_type = "serial";
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device_type = "serial";
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compatible = "ns16550";
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compatible = "ns16550";
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- reg = <4600 100>;
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+ reg = <0x4600 0x100>;
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clock-frequency = <0>;
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clock-frequency = <0>;
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- interrupts = <a 8>;
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- interrupt-parent = < &ipic >;
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+ interrupts = <10 8>;
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+ interrupt-parent = <&ipic>;
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};
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};
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/* May need to remove if on a part without crypto engine */
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/* May need to remove if on a part without crypto engine */
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@@ -196,15 +198,15 @@
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device_type = "crypto";
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device_type = "crypto";
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model = "SEC2";
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model = "SEC2";
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compatible = "talitos";
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compatible = "talitos";
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- reg = <30000 10000>;
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- interrupts = <b 8>;
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- interrupt-parent = < &ipic >;
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+ reg = <0x30000 0x10000>;
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+ interrupts = <11 8>;
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+ interrupt-parent = <&ipic>;
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num-channels = <4>;
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num-channels = <4>;
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- channel-fifo-len = <18>;
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- exec-units-mask = <0000007e>;
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+ channel-fifo-len = <0x18>;
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+ exec-units-mask = <0x0000007e>;
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/* desc mask is for rev2.0,
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/* desc mask is for rev2.0,
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* we need runtime fixup for >2.0 */
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* we need runtime fixup for >2.0 */
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- descriptor-types-mask = <01010ebf>;
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+ descriptor-types-mask = <0x01010ebf>;
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};
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};
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/* IPIC
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/* IPIC
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@@ -217,129 +219,129 @@
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interrupt-controller;
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interrupt-controller;
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#address-cells = <0>;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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#interrupt-cells = <2>;
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- reg = <700 100>;
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+ reg = <0x700 0x100>;
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device_type = "ipic";
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device_type = "ipic";
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};
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};
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};
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};
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pci0: pci@e0008500 {
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pci0: pci@e0008500 {
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cell-index = <1>;
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cell-index = <1>;
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- interrupt-map-mask = <f800 0 0 7>;
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+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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interrupt-map = <
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/* IDSEL 0x11 */
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/* IDSEL 0x11 */
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- 8800 0 0 1 &ipic 14 8
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- 8800 0 0 2 &ipic 15 8
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- 8800 0 0 3 &ipic 16 8
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- 8800 0 0 4 &ipic 17 8
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+ 0x8800 0x0 0x0 0x1 &ipic 20 0x8
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+ 0x8800 0x0 0x0 0x2 &ipic 21 0x8
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+ 0x8800 0x0 0x0 0x3 &ipic 22 0x8
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+ 0x8800 0x0 0x0 0x4 &ipic 23 0x8
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/* IDSEL 0x12 */
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/* IDSEL 0x12 */
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- 9000 0 0 1 &ipic 16 8
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- 9000 0 0 2 &ipic 17 8
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- 9000 0 0 3 &ipic 14 8
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- 9000 0 0 4 &ipic 15 8
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+ 0x9000 0x0 0x0 0x1 &ipic 22 0x8
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+ 0x9000 0x0 0x0 0x2 &ipic 23 0x8
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+ 0x9000 0x0 0x0 0x3 &ipic 20 0x8
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+ 0x9000 0x0 0x0 0x4 &ipic 21 0x8
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/* IDSEL 0x13 */
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/* IDSEL 0x13 */
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- 9800 0 0 1 &ipic 17 8
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- 9800 0 0 2 &ipic 14 8
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- 9800 0 0 3 &ipic 15 8
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- 9800 0 0 4 &ipic 16 8
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+ 0x9800 0x0 0x0 0x1 &ipic 23 0x8
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+ 0x9800 0x0 0x0 0x2 &ipic 20 0x8
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+ 0x9800 0x0 0x0 0x3 &ipic 21 0x8
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+ 0x9800 0x0 0x0 0x4 &ipic 22 0x8
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/* IDSEL 0x15 */
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/* IDSEL 0x15 */
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- a800 0 0 1 &ipic 14 8
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- a800 0 0 2 &ipic 15 8
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- a800 0 0 3 &ipic 16 8
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- a800 0 0 4 &ipic 17 8
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+ 0xa800 0x0 0x0 0x1 &ipic 20 0x8
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+ 0xa800 0x0 0x0 0x2 &ipic 21 0x8
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+ 0xa800 0x0 0x0 0x3 &ipic 22 0x8
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+ 0xa800 0x0 0x0 0x4 &ipic 23 0x8
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/* IDSEL 0x16 */
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/* IDSEL 0x16 */
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- b000 0 0 1 &ipic 17 8
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- b000 0 0 2 &ipic 14 8
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- b000 0 0 3 &ipic 15 8
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- b000 0 0 4 &ipic 16 8
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+ 0xb000 0x0 0x0 0x1 &ipic 23 0x8
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+ 0xb000 0x0 0x0 0x2 &ipic 20 0x8
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+ 0xb000 0x0 0x0 0x3 &ipic 21 0x8
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+ 0xb000 0x0 0x0 0x4 &ipic 22 0x8
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/* IDSEL 0x17 */
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/* IDSEL 0x17 */
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- b800 0 0 1 &ipic 16 8
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- b800 0 0 2 &ipic 17 8
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- b800 0 0 3 &ipic 14 8
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- b800 0 0 4 &ipic 15 8
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+ 0xb800 0x0 0x0 0x1 &ipic 22 0x8
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+ 0xb800 0x0 0x0 0x2 &ipic 23 0x8
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+ 0xb800 0x0 0x0 0x3 &ipic 20 0x8
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+ 0xb800 0x0 0x0 0x4 &ipic 21 0x8
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/* IDSEL 0x18 */
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/* IDSEL 0x18 */
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- c000 0 0 1 &ipic 15 8
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|
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- c000 0 0 2 &ipic 16 8
|
|
|
|
- c000 0 0 3 &ipic 17 8
|
|
|
|
- c000 0 0 4 &ipic 14 8>;
|
|
|
|
- interrupt-parent = < &ipic >;
|
|
|
|
- interrupts = <42 8>;
|
|
|
|
|
|
+ 0xc000 0x0 0x0 0x1 &ipic 21 0x8
|
|
|
|
+ 0xc000 0x0 0x0 0x2 &ipic 22 0x8
|
|
|
|
+ 0xc000 0x0 0x0 0x3 &ipic 23 0x8
|
|
|
|
+ 0xc000 0x0 0x0 0x4 &ipic 20 8>;
|
|
|
|
+ interrupt-parent = <&ipic>;
|
|
|
|
+ interrupts = <66 8>;
|
|
bus-range = <0 0>;
|
|
bus-range = <0 0>;
|
|
- ranges = <02000000 0 90000000 90000000 0 10000000
|
|
|
|
- 42000000 0 80000000 80000000 0 10000000
|
|
|
|
- 01000000 0 00000000 e2000000 0 00100000>;
|
|
|
|
- clock-frequency = <3f940aa>;
|
|
|
|
|
|
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
|
|
|
|
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
|
|
|
|
+ 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
|
|
|
|
+ clock-frequency = <66666666>;
|
|
#interrupt-cells = <1>;
|
|
#interrupt-cells = <1>;
|
|
#size-cells = <2>;
|
|
#size-cells = <2>;
|
|
#address-cells = <3>;
|
|
#address-cells = <3>;
|
|
- reg = <e0008500 100>;
|
|
|
|
|
|
+ reg = <0xe0008500 0x100>;
|
|
compatible = "fsl,mpc8349-pci";
|
|
compatible = "fsl,mpc8349-pci";
|
|
device_type = "pci";
|
|
device_type = "pci";
|
|
};
|
|
};
|
|
|
|
|
|
pci1: pci@e0008600 {
|
|
pci1: pci@e0008600 {
|
|
cell-index = <2>;
|
|
cell-index = <2>;
|
|
- interrupt-map-mask = <f800 0 0 7>;
|
|
|
|
|
|
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
|
interrupt-map = <
|
|
interrupt-map = <
|
|
|
|
|
|
/* IDSEL 0x11 */
|
|
/* IDSEL 0x11 */
|
|
- 8800 0 0 1 &ipic 14 8
|
|
|
|
- 8800 0 0 2 &ipic 15 8
|
|
|
|
- 8800 0 0 3 &ipic 16 8
|
|
|
|
- 8800 0 0 4 &ipic 17 8
|
|
|
|
|
|
+ 0x8800 0x0 0x0 0x1 &ipic 20 0x8
|
|
|
|
+ 0x8800 0x0 0x0 0x2 &ipic 21 0x8
|
|
|
|
+ 0x8800 0x0 0x0 0x3 &ipic 22 0x8
|
|
|
|
+ 0x8800 0x0 0x0 0x4 &ipic 23 0x8
|
|
|
|
|
|
/* IDSEL 0x12 */
|
|
/* IDSEL 0x12 */
|
|
- 9000 0 0 1 &ipic 16 8
|
|
|
|
- 9000 0 0 2 &ipic 17 8
|
|
|
|
- 9000 0 0 3 &ipic 14 8
|
|
|
|
- 9000 0 0 4 &ipic 15 8
|
|
|
|
|
|
+ 0x9000 0x0 0x0 0x1 &ipic 22 0x8
|
|
|
|
+ 0x9000 0x0 0x0 0x2 &ipic 23 0x8
|
|
|
|
+ 0x9000 0x0 0x0 0x3 &ipic 20 0x8
|
|
|
|
+ 0x9000 0x0 0x0 0x4 &ipic 21 0x8
|
|
|
|
|
|
/* IDSEL 0x13 */
|
|
/* IDSEL 0x13 */
|
|
- 9800 0 0 1 &ipic 17 8
|
|
|
|
- 9800 0 0 2 &ipic 14 8
|
|
|
|
- 9800 0 0 3 &ipic 15 8
|
|
|
|
- 9800 0 0 4 &ipic 16 8
|
|
|
|
|
|
+ 0x9800 0x0 0x0 0x1 &ipic 23 0x8
|
|
|
|
+ 0x9800 0x0 0x0 0x2 &ipic 20 0x8
|
|
|
|
+ 0x9800 0x0 0x0 0x3 &ipic 21 0x8
|
|
|
|
+ 0x9800 0x0 0x0 0x4 &ipic 22 0x8
|
|
|
|
|
|
/* IDSEL 0x15 */
|
|
/* IDSEL 0x15 */
|
|
- a800 0 0 1 &ipic 14 8
|
|
|
|
- a800 0 0 2 &ipic 15 8
|
|
|
|
- a800 0 0 3 &ipic 16 8
|
|
|
|
- a800 0 0 4 &ipic 17 8
|
|
|
|
|
|
+ 0xa800 0x0 0x0 0x1 &ipic 20 0x8
|
|
|
|
+ 0xa800 0x0 0x0 0x2 &ipic 21 0x8
|
|
|
|
+ 0xa800 0x0 0x0 0x3 &ipic 22 0x8
|
|
|
|
+ 0xa800 0x0 0x0 0x4 &ipic 23 0x8
|
|
|
|
|
|
/* IDSEL 0x16 */
|
|
/* IDSEL 0x16 */
|
|
- b000 0 0 1 &ipic 17 8
|
|
|
|
- b000 0 0 2 &ipic 14 8
|
|
|
|
- b000 0 0 3 &ipic 15 8
|
|
|
|
- b000 0 0 4 &ipic 16 8
|
|
|
|
|
|
+ 0xb000 0x0 0x0 0x1 &ipic 23 0x8
|
|
|
|
+ 0xb000 0x0 0x0 0x2 &ipic 20 0x8
|
|
|
|
+ 0xb000 0x0 0x0 0x3 &ipic 21 0x8
|
|
|
|
+ 0xb000 0x0 0x0 0x4 &ipic 22 0x8
|
|
|
|
|
|
/* IDSEL 0x17 */
|
|
/* IDSEL 0x17 */
|
|
- b800 0 0 1 &ipic 16 8
|
|
|
|
- b800 0 0 2 &ipic 17 8
|
|
|
|
- b800 0 0 3 &ipic 14 8
|
|
|
|
- b800 0 0 4 &ipic 15 8
|
|
|
|
|
|
+ 0xb800 0x0 0x0 0x1 &ipic 22 0x8
|
|
|
|
+ 0xb800 0x0 0x0 0x2 &ipic 23 0x8
|
|
|
|
+ 0xb800 0x0 0x0 0x3 &ipic 20 0x8
|
|
|
|
+ 0xb800 0x0 0x0 0x4 &ipic 21 0x8
|
|
|
|
|
|
/* IDSEL 0x18 */
|
|
/* IDSEL 0x18 */
|
|
- c000 0 0 1 &ipic 15 8
|
|
|
|
- c000 0 0 2 &ipic 16 8
|
|
|
|
- c000 0 0 3 &ipic 17 8
|
|
|
|
- c000 0 0 4 &ipic 14 8>;
|
|
|
|
- interrupt-parent = < &ipic >;
|
|
|
|
- interrupts = <42 8>;
|
|
|
|
|
|
+ 0xc000 0x0 0x0 0x1 &ipic 21 0x8
|
|
|
|
+ 0xc000 0x0 0x0 0x2 &ipic 22 0x8
|
|
|
|
+ 0xc000 0x0 0x0 0x3 &ipic 23 0x8
|
|
|
|
+ 0xc000 0x0 0x0 0x4 &ipic 20 8>;
|
|
|
|
+ interrupt-parent = <&ipic>;
|
|
|
|
+ interrupts = <66 8>;
|
|
bus-range = <0 0>;
|
|
bus-range = <0 0>;
|
|
- ranges = <02000000 0 b0000000 b0000000 0 10000000
|
|
|
|
- 42000000 0 a0000000 a0000000 0 10000000
|
|
|
|
- 01000000 0 00000000 e2100000 0 00100000>;
|
|
|
|
- clock-frequency = <3f940aa>;
|
|
|
|
|
|
+ ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
|
|
|
|
+ 0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
|
|
|
|
+ 0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>;
|
|
|
|
+ clock-frequency = <66666666>;
|
|
#interrupt-cells = <1>;
|
|
#interrupt-cells = <1>;
|
|
#size-cells = <2>;
|
|
#size-cells = <2>;
|
|
#address-cells = <3>;
|
|
#address-cells = <3>;
|
|
- reg = <e0008600 100>;
|
|
|
|
|
|
+ reg = <0xe0008600 0x100>;
|
|
compatible = "fsl,mpc8349-pci";
|
|
compatible = "fsl,mpc8349-pci";
|
|
device_type = "pci";
|
|
device_type = "pci";
|
|
};
|
|
};
|