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@@ -26,6 +26,10 @@
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#include "cx18-scb.h"
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#include "cx18-irq.h"
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#include "cx18-mailbox.h"
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+#include "cx18-queue.h"
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+#include "cx18-streams.h"
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+
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+static const char *rpu_str[] = { "APU", "CPU", "EPU", "HPU" };
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#define API_FAST (1 << 2) /* Short timeout */
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#define API_SLOW (1 << 3) /* Additional 300ms timeout */
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@@ -92,12 +96,149 @@ static const struct cx18_api_info *find_api_info(u32 cmd)
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return NULL;
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}
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-long cx18_mb_ack(struct cx18 *cx, const struct cx18_mailbox *mb, int rpu)
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+static void dump_mb(struct cx18 *cx, struct cx18_mailbox *mb, char *name)
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+{
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+ char argstr[MAX_MB_ARGUMENTS*11+1];
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+ char *p;
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+ int i;
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+
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+ if (!(cx18_debug & CX18_DBGFLG_API))
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+ return;
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+
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+ for (i = 0, p = argstr; i < MAX_MB_ARGUMENTS; i++, p += 11) {
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+ /* kernel snprintf() appends '\0' always */
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+ snprintf(p, 12, " %#010x", mb->args[i]);
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+ }
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+ CX18_DEBUG_API("%s: req %#010x ack %#010x cmd %#010x err %#010x args%s"
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+ "\n", name, mb->request, mb->ack, mb->cmd, mb->error, argstr);
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+}
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+
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+
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+/*
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+ * Functions that run in a work_queue work handling context
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+ */
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+
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+static void epu_dma_done(struct cx18 *cx, struct cx18_epu_work_order *order)
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+{
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+ u32 handle, mdl_ack_count;
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+ struct cx18_mailbox *mb;
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+ struct cx18_mdl_ack *mdl_ack;
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+ struct cx18_stream *s;
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+ struct cx18_buffer *buf;
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+ int i;
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+
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+ mb = &order->mb;
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+ handle = mb->args[0];
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+ s = cx18_handle_to_stream(cx, handle);
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+
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+ if (s == NULL) {
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+ CX18_WARN("Got DMA done notification for unknown/inactive"
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+ " handle %d\n", handle);
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+ return;
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+ }
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+
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+ mdl_ack_count = mb->args[2];
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+ mdl_ack = order->mdl_ack;
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+ for (i = 0; i < mdl_ack_count; i++, mdl_ack++) {
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+ buf = cx18_queue_get_buf(s, mdl_ack->id, mdl_ack->data_used);
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+ CX18_DEBUG_HI_DMA("DMA DONE for %s (buffer %d)\n", s->name,
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+ mdl_ack->id);
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+ if (buf == NULL) {
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+ CX18_WARN("Could not find buf %d for stream %s\n",
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+ mdl_ack->id, s->name);
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+ continue;
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+ }
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+
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+ cx18_buf_sync_for_cpu(s, buf);
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+ if (s->type == CX18_ENC_STREAM_TYPE_TS && s->dvb.enabled) {
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+ CX18_DEBUG_HI_DMA("TS recv bytesused = %d\n",
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+ buf->bytesused);
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+
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+ dvb_dmx_swfilter(&s->dvb.demux, buf->buf,
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+ buf->bytesused);
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+
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+ cx18_buf_sync_for_device(s, buf);
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+
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+ if (s->handle != CX18_INVALID_TASK_HANDLE &&
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+ test_bit(CX18_F_S_STREAMING, &s->s_flags))
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+ cx18_vapi(cx,
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+ CX18_CPU_DE_SET_MDL, 5, s->handle,
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+ (void __iomem *)
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+ &cx->scb->cpu_mdl[buf->id] - cx->enc_mem,
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+ 1, buf->id, s->buf_size);
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+ } else
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+ set_bit(CX18_F_B_NEED_BUF_SWAP, &buf->b_flags);
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+ }
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+ wake_up(&cx->dma_waitq);
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+ if (s->id != -1)
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+ wake_up(&s->waitq);
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+}
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+
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+static void epu_debug(struct cx18 *cx, struct cx18_epu_work_order *order)
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+{
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+ char *p;
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+ char *str = order->str;
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+
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+ CX18_DEBUG_INFO("%x %s\n", order->mb.args[0], str);
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+ p = strchr(str, '.');
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+ if (!test_bit(CX18_F_I_LOADED_FW, &cx->i_flags) && p && p > str)
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+ CX18_INFO("FW version: %s\n", p - 1);
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+}
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+
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+static void epu_cmd(struct cx18 *cx, struct cx18_epu_work_order *order)
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+{
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+ switch (order->rpu) {
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+ case CPU:
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+ {
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+ switch (order->mb.cmd) {
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+ case CX18_EPU_DMA_DONE:
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+ epu_dma_done(cx, order);
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+ break;
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+ case CX18_EPU_DEBUG:
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+ epu_debug(cx, order);
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+ break;
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+ default:
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+ CX18_WARN("Unknown CPU to EPU mailbox command %#0x\n",
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+ order->mb.cmd);
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+ break;
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+ }
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+ break;
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+ }
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+ case APU:
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+ CX18_WARN("Unknown APU to EPU mailbox command %#0x\n",
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+ order->mb.cmd);
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+ break;
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+ default:
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+ break;
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+ }
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+}
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+
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+static
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+void free_epu_work_order(struct cx18 *cx, struct cx18_epu_work_order *order)
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+{
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+ atomic_set(&order->pending, 0);
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+}
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+
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+void cx18_epu_work_handler(struct work_struct *work)
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+{
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+ struct cx18_epu_work_order *order =
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+ container_of(work, struct cx18_epu_work_order, work);
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+ struct cx18 *cx = order->cx;
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+ epu_cmd(cx, order);
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+ free_epu_work_order(cx, order);
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+}
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+
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+
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+/*
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+ * Functions that run in an interrupt handling context
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+ */
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+
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+static void mb_ack_irq(struct cx18 *cx, const struct cx18_epu_work_order *order)
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{
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struct cx18_mailbox __iomem *ack_mb;
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- u32 ack_irq;
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+ u32 ack_irq, req;
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- switch (rpu) {
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+ switch (order->rpu) {
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case APU:
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ack_irq = IRQ_EPU_TO_APU_ACK;
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ack_mb = &cx->scb->apu2epu_mb;
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@@ -108,16 +249,175 @@ long cx18_mb_ack(struct cx18 *cx, const struct cx18_mailbox *mb, int rpu)
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break;
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default:
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CX18_WARN("Unhandled RPU (%d) for command %x ack\n",
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- rpu, mb->cmd);
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- return -EINVAL;
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+ order->rpu, order->mb.cmd);
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+ return;
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}
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- cx18_setup_page(cx, SCB_OFFSET);
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- cx18_write_sync(cx, mb->request, &ack_mb->ack);
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+ req = order->mb.request;
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+ /* Don't ack if the RPU has gotten impatient and timed us out */
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+ if (req != cx18_readl(cx, &ack_mb->request) ||
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+ req == cx18_readl(cx, &ack_mb->ack))
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+ return;
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+ cx18_writel(cx, req, &ack_mb->ack);
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cx18_write_reg_expect(cx, ack_irq, SW2_INT_SET, ack_irq, ack_irq);
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- return 0;
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+ return;
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+}
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+
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+static int epu_dma_done_irq(struct cx18 *cx, struct cx18_epu_work_order *order,
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+ int stale)
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+{
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+ u32 handle, mdl_ack_offset, mdl_ack_count;
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+ struct cx18_mailbox *mb;
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+
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+ mb = &order->mb;
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+ handle = mb->args[0];
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+ mdl_ack_offset = mb->args[1];
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+ mdl_ack_count = mb->args[2];
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+
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+ if (handle == CX18_INVALID_TASK_HANDLE ||
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+ mdl_ack_count == 0 || mdl_ack_count > CX18_MAX_MDL_ACKS) {
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+ if (!stale)
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+ mb_ack_irq(cx, order);
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+ return -1;
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+ }
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+
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+ cx18_memcpy_fromio(cx, order->mdl_ack, cx->enc_mem + mdl_ack_offset,
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+ sizeof(struct cx18_mdl_ack) * mdl_ack_count);
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+ if (!stale)
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+ mb_ack_irq(cx, order);
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+ return 1;
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+}
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+
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+static
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+int epu_debug_irq(struct cx18 *cx, struct cx18_epu_work_order *order, int stale)
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+{
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+ u32 str_offset;
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+ char *str = order->str;
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+
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+ str[0] = '\0';
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+ str_offset = order->mb.args[1];
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+ if (str_offset) {
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+ cx18_setup_page(cx, str_offset);
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+ cx18_memcpy_fromio(cx, str, cx->enc_mem + str_offset, 252);
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+ str[252] = '\0';
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+ cx18_setup_page(cx, SCB_OFFSET);
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+ }
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+
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+ if (!stale)
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+ mb_ack_irq(cx, order);
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+
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+ return str_offset ? 1 : 0;
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+}
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+
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+static inline
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+int epu_cmd_irq(struct cx18 *cx, struct cx18_epu_work_order *order, int stale)
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+{
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+ int ret = -1;
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+
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+ switch (order->rpu) {
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+ case CPU:
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+ {
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+ switch (order->mb.cmd) {
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+ case CX18_EPU_DMA_DONE:
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+ ret = epu_dma_done_irq(cx, order, stale);
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+ break;
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+ case CX18_EPU_DEBUG:
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+ ret = epu_debug_irq(cx, order, stale);
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+ break;
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+ default:
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+ CX18_WARN("Unknown CPU to EPU mailbox command %#0x\n",
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+ order->mb.cmd);
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+ break;
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+ }
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+ break;
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+ }
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+ case APU:
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+ CX18_WARN("Unknown APU to EPU mailbox command %#0x\n",
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+ order->mb.cmd);
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+ break;
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+ default:
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+ break;
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+ }
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+ return ret;
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+}
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+
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+static inline
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+struct cx18_epu_work_order *alloc_epu_work_order_irq(struct cx18 *cx)
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+{
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+ int i;
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+ struct cx18_epu_work_order *order = NULL;
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+
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+ for (i = 0; i < CX18_MAX_EPU_WORK_ORDERS; i++) {
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+ /*
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+ * We only need "pending" atomic to inspect its contents,
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+ * and need not do a check and set because:
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+ * 1. Any work handler thread only clears "pending" and only
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+ * on one, particular work order at a time, per handler thread.
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+ * 2. "pending" is only set here, and we're serialized because
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+ * we're called in an IRQ handler context.
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+ */
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+ if (atomic_read(&cx->epu_work_order[i].pending) == 0) {
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+ order = &cx->epu_work_order[i];
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+ atomic_set(&order->pending, 1);
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+ break;
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+ }
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+ }
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+ return order;
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}
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+void cx18_api_epu_cmd_irq(struct cx18 *cx, int rpu)
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+{
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+ struct cx18_mailbox __iomem *mb;
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+ struct cx18_mailbox *order_mb;
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+ struct cx18_epu_work_order *order;
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+ int stale = 0;
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+ int submit;
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+
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+ switch (rpu) {
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+ case CPU:
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+ mb = &cx->scb->cpu2epu_mb;
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+ break;
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+ case APU:
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+ mb = &cx->scb->apu2epu_mb;
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+ break;
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+ default:
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+ return;
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+ }
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+
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+ order = alloc_epu_work_order_irq(cx);
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+ if (order == NULL) {
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+ CX18_WARN("Unable to find blank work order form to schedule "
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+ "incoming mailbox command processing\n");
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+ return;
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+ }
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+
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+ order->rpu = rpu;
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+ order_mb = &order->mb;
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+ cx18_memcpy_fromio(cx, order_mb, mb, sizeof(struct cx18_mailbox));
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+
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+ if (order_mb->request == order_mb->ack) {
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+ CX18_WARN("Possibly falling behind: %s self-ack'ed our incoming"
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+ " %s to EPU mailbox (sequence no. %u)\n",
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+ rpu_str[rpu], rpu_str[rpu], order_mb->request);
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+ dump_mb(cx, order_mb, "incoming");
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+ stale = 1;
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+ }
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+
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+ /*
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+ * Individual EPU command processing is responsible for ack-ing
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+ * a non-stale mailbox as soon as possible
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+ */
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+ submit = epu_cmd_irq(cx, order, stale);
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+ if (submit > 0) {
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+ schedule_work(&order->work);
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+ }
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+}
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+
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+
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+/*
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+ * Functions called from a non-interrupt, non work_queue context
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+ */
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+
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static void cx18_api_log_ack_delay(struct cx18 *cx, int msecs)
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{
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if (msecs > CX18_MAX_MB_ACK_DELAY)
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@@ -167,8 +467,6 @@ static int cx18_api_call(struct cx18 *cx, u32 cmd, int args, u32 data[])
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}
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mutex_lock(mb_lock);
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- cx18_setup_page(cx, SCB_OFFSET);
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-
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/*
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* Wait for an in-use mailbox to complete
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*
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Andy Walls