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@@ -530,6 +530,15 @@ void radeon_pm_suspend(struct radeon_device *rdev)
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void radeon_pm_resume(struct radeon_device *rdev)
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{
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+ /* set up the default clocks if the MC ucode is loaded */
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+ if (ASIC_IS_DCE5(rdev) && rdev->mc_fw) {
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+ if (rdev->pm.default_vddc)
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+ radeon_atom_set_voltage(rdev, rdev->pm.default_vddc);
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+ if (rdev->pm.default_sclk)
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+ radeon_set_engine_clock(rdev, rdev->pm.default_sclk);
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+ if (rdev->pm.default_mclk)
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+ radeon_set_memory_clock(rdev, rdev->pm.default_mclk);
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+ }
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/* asic init will reset the default power state */
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mutex_lock(&rdev->pm.mutex);
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rdev->pm.current_power_state_index = rdev->pm.default_power_state_index;
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@@ -571,6 +580,15 @@ int radeon_pm_init(struct radeon_device *rdev)
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radeon_combios_get_power_modes(rdev);
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radeon_pm_print_states(rdev);
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radeon_pm_init_profile(rdev);
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+ /* set up the default clocks if the MC ucode is loaded */
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+ if (ASIC_IS_DCE5(rdev) && rdev->mc_fw) {
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+ if (rdev->pm.default_vddc)
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+ radeon_atom_set_voltage(rdev, rdev->pm.default_vddc);
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+ if (rdev->pm.default_sclk)
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+ radeon_set_engine_clock(rdev, rdev->pm.default_sclk);
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+ if (rdev->pm.default_mclk)
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+ radeon_set_memory_clock(rdev, rdev->pm.default_mclk);
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+ }
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}
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/* set up the internal thermal sensor if applicable */
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