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@@ -99,8 +99,8 @@ typedef enum {
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ZM_HAL_ANI_PHYERR_RESET, /* reset phy error stats */
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} ZM_HAL_ANI_CMD;
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-#define AR_PHY_COUNTMAX (3 << 22) // Max counted before intr
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-#define ZM_HAL_PROCESS_ANI 0x00000001 /* ANI state setup */
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+#define AR_PHY_COUNTMAX (3 << 22) /* Max counted before intr */
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+#define ZM_HAL_PROCESS_ANI 0x00000001 /* ANI state setup */
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#define ZM_RSSI_DUMMY_MARKER 0x127
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/* PHY registers in ar5416, related base and register offsets
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@@ -353,7 +353,7 @@ typedef enum {
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#define AR_PHY_CCK_DETECT 0x1C6208
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#define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK 0x0000003F
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#define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK_S 0
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-#define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME 0x00001FC0 // [12:6] settling time for antenna switch
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+#define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME 0x00001FC0 /* [12:6] settling time for antenna switch */
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#define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME_S 6
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#define AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV 0x2000
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@@ -392,7 +392,6 @@ typedef enum {
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#define AR_PHY_TPCRG1_PD_GAIN_2_S 18
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#define AR_PHY_TPCRG1_PD_GAIN_3 0x00300000
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#define AR_PHY_TPCRG1_PD_GAIN_3_S 20
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-//
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#define AR_PHY_ANALOG_SWAP 0xa268
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#define AR_PHY_SWAP_ALT_CHAIN 0x00000040
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