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@@ -195,6 +195,19 @@ static void pcap_irq_handler(unsigned int irq, struct irq_desc *desc)
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}
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/* ADC */
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+void pcap_set_ts_bits(struct pcap_chip *pcap, u32 bits)
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+{
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+ u32 tmp;
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+
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+ mutex_lock(&pcap->adc_mutex);
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+ ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp);
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+ tmp &= ~(PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR);
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+ tmp |= bits & (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR);
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+ ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
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+ mutex_unlock(&pcap->adc_mutex);
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+}
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+EXPORT_SYMBOL_GPL(pcap_set_ts_bits);
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+
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static void pcap_disable_adc(struct pcap_chip *pcap)
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{
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u32 tmp;
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@@ -217,15 +230,16 @@ static void pcap_adc_trigger(struct pcap_chip *pcap)
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mutex_unlock(&pcap->adc_mutex);
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return;
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}
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- mutex_unlock(&pcap->adc_mutex);
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-
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- /* start conversion on requested bank */
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- tmp = pcap->adc_queue[head]->flags | PCAP_ADC_ADEN;
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+ /* start conversion on requested bank, save TS_M bits */
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+ ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp);
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+ tmp &= (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR);
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+ tmp |= pcap->adc_queue[head]->flags | PCAP_ADC_ADEN;
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if (pcap->adc_queue[head]->bank == PCAP_ADC_BANK_1)
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tmp |= PCAP_ADC_AD_SEL1;
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ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
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+ mutex_unlock(&pcap->adc_mutex);
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ezx_pcap_write(pcap, PCAP_REG_ADR, PCAP_ADR_ASC);
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}
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