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+/*
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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+ * for more details.
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+ *
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+ * Chris Dearman (chris@mips.com)
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+ * Copyright (C) 2007 Mips Technologies, Inc.
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+ */
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+#ifndef __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H
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+#define __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H
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+
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+ .macro kernel_entry_setup
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+#ifdef CONFIG_MIPS_MT_SMTC
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+ mfc0 t0, CP0_CONFIG
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+ bgez t0, 9f
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+ mfc0 t0, CP0_CONFIG, 1
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+ bgez t0, 9f
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+ mfc0 t0, CP0_CONFIG, 2
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+ bgez t0, 9f
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+ mfc0 t0, CP0_CONFIG, 3
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+ and t0, 1<<2
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+ bnez t0, 0f
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+9:
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+ /* Assume we came from YAMON... */
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+ PTR_LA v0, 0x9fc00534 /* YAMON print */
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+ lw v0, (v0)
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+ move a0, zero
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+ PTR_LA a1, nonmt_processor
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+ jal v0
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+
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+ PTR_LA v0, 0x9fc00520 /* YAMON exit */
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+ lw v0, (v0)
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+ li a0, 1
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+ jal v0
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+
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+1: b 1b
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+
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+ __INITDATA
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+nonmt_processor:
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+ .asciz "SMTC kernel requires the MT ASE to run\n"
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+ __FINIT
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+0:
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+#endif
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+ .endm
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+
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+/*
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+ * Do SMP slave processor setup necessary before we can safely execute C code.
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+ */
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+ .macro smp_slave_setup
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+ .endm
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+
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+#endif /* __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H */
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