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@@ -100,6 +100,7 @@ static int sg_version_num = 30534; /* 2 digits for each component */
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#define FORMAT_UNIT_PROT_INT_OFFSET 3
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#define FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET 0
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#define FORMAT_UNIT_PROT_FIELD_USAGE_MASK 0x07
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+#define UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET 7
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/* Misc. defines */
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#define NIBBLE_SHIFT 4
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@@ -2862,6 +2863,80 @@ static int nvme_trans_write_buffer(struct nvme_ns *ns, struct sg_io_hdr *hdr,
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return res;
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}
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+struct scsi_unmap_blk_desc {
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+ __be64 slba;
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+ __be32 nlb;
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+ u32 resv;
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+};
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+
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+struct scsi_unmap_parm_list {
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+ __be16 unmap_data_len;
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+ __be16 unmap_blk_desc_data_len;
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+ u32 resv;
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+ struct scsi_unmap_blk_desc desc[0];
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+};
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+
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+static int nvme_trans_unmap(struct nvme_ns *ns, struct sg_io_hdr *hdr,
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+ u8 *cmd)
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+{
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+ struct nvme_dev *dev = ns->dev;
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+ struct scsi_unmap_parm_list *plist;
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+ struct nvme_dsm_range *range;
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+ struct nvme_queue *nvmeq;
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+ struct nvme_command c;
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+ int i, nvme_sc, res = -ENOMEM;
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+ u16 ndesc, list_len;
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+ dma_addr_t dma_addr;
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+
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+ list_len = GET_U16_FROM_CDB(cmd, UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET);
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+ if (!list_len)
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+ return -EINVAL;
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+
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+ plist = kmalloc(list_len, GFP_KERNEL);
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+ if (!plist)
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+ return -ENOMEM;
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+
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+ res = nvme_trans_copy_from_user(hdr, plist, list_len);
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+ if (res != SNTI_TRANSLATION_SUCCESS)
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+ goto out;
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+
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+ ndesc = be16_to_cpu(plist->unmap_blk_desc_data_len) >> 4;
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+ if (!ndesc || ndesc > 256) {
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+ res = -EINVAL;
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+ goto out;
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+ }
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+
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+ range = dma_alloc_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
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+ &dma_addr, GFP_KERNEL);
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+ if (!range)
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+ goto out;
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+
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+ for (i = 0; i < ndesc; i++) {
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+ range[i].nlb = cpu_to_le32(be32_to_cpu(plist->desc[i].nlb));
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+ range[i].slba = cpu_to_le64(be64_to_cpu(plist->desc[i].slba));
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+ range[i].cattr = 0;
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+ }
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+
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+ memset(&c, 0, sizeof(c));
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+ c.dsm.opcode = nvme_cmd_dsm;
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+ c.dsm.nsid = cpu_to_le32(ns->ns_id);
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+ c.dsm.prp1 = cpu_to_le64(dma_addr);
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+ c.dsm.nr = cpu_to_le32(ndesc - 1);
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+ c.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
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+
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+ nvmeq = get_nvmeq(dev);
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+ put_nvmeq(nvmeq);
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+
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+ nvme_sc = nvme_submit_sync_cmd(nvmeq, &c, NULL, NVME_IO_TIMEOUT);
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+ res = nvme_trans_status_code(hdr, nvme_sc);
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+
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+ dma_free_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
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+ range, dma_addr);
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+ out:
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+ kfree(plist);
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+ return res;
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+}
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+
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static int nvme_scsi_translate(struct nvme_ns *ns, struct sg_io_hdr *hdr)
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{
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u8 cmd[BLK_MAX_CDB];
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@@ -2936,6 +3011,9 @@ static int nvme_scsi_translate(struct nvme_ns *ns, struct sg_io_hdr *hdr)
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case WRITE_BUFFER:
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retcode = nvme_trans_write_buffer(ns, hdr, cmd);
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break;
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+ case UNMAP:
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+ retcode = nvme_trans_unmap(ns, hdr, cmd);
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+ break;
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default:
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out:
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retcode = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
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