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@@ -213,6 +213,8 @@ struct mal_instance {
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struct of_device *ofdev;
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struct of_device *ofdev;
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int index;
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int index;
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spinlock_t lock;
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spinlock_t lock;
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+
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+ unsigned int features;
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};
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};
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static inline u32 get_mal_dcrn(struct mal_instance *mal, int reg)
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static inline u32 get_mal_dcrn(struct mal_instance *mal, int reg)
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@@ -225,6 +227,38 @@ static inline void set_mal_dcrn(struct mal_instance *mal, int reg, u32 val)
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dcr_write(mal->dcr_host, reg, val);
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dcr_write(mal->dcr_host, reg, val);
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}
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}
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+/* Features of various MAL implementations */
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+
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+/* Set if you have interrupt coalescing and you have to clear the SDR
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+ * register for TXEOB and RXEOB interrupts to work
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+ */
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+#define MAL_FTR_CLEAR_ICINTSTAT 0x00000001
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+
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+/* Set if your MAL has SERR, TXDE, and RXDE OR'd into a single UIC
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+ * interrupt
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+ */
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+#define MAL_FTR_COMMON_ERR_INT 0x00000002
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+
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+enum {
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+ MAL_FTRS_ALWAYS = 0,
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+
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+ MAL_FTRS_POSSIBLE =
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+#ifdef CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT
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+ MAL_FTR_CLEAR_ICINTSTAT |
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+#endif
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+#ifdef CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR
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+ MAL_FTR_COMMON_ERR_INT |
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+#endif
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+ 0,
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+};
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+
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+static inline int mal_has_feature(struct mal_instance *dev,
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+ unsigned long feature)
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+{
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+ return (MAL_FTRS_ALWAYS & feature) ||
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+ (MAL_FTRS_POSSIBLE & dev->features & feature);
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+}
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+
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/* Register MAL devices */
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/* Register MAL devices */
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int mal_init(void);
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int mal_init(void);
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void mal_exit(void);
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void mal_exit(void);
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