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@@ -122,15 +122,75 @@ static u64 tsc_read_refs(u64 *pm, u64 *hpet)
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return ULLONG_MAX;
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}
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+/*
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+ * Try to calibrate the TSC against the Programmable
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+ * Interrupt Timer and return the frequency of the TSC
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+ * in kHz.
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+ *
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+ * Return ULONG_MAX on failure to calibrate.
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+ */
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+static unsigned long pit_calibrate_tsc(void)
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+{
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+ u64 tsc, t1, t2, delta;
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+ unsigned long tscmin, tscmax;
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+ int pitcnt;
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+
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+ /* Set the Gate high, disable speaker */
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+ outb((inb(0x61) & ~0x02) | 0x01, 0x61);
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+
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+ /*
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+ * Setup CTC channel 2* for mode 0, (interrupt on terminal
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+ * count mode), binary count. Set the latch register to 50ms
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+ * (LSB then MSB) to begin countdown.
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+ */
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+ outb(0xb0, 0x43);
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+ outb((CLOCK_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
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+ outb((CLOCK_TICK_RATE / (1000 / 50)) >> 8, 0x42);
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+
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+ tsc = t1 = t2 = get_cycles();
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+
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+ pitcnt = 0;
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+ tscmax = 0;
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+ tscmin = ULONG_MAX;
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+ while ((inb(0x61) & 0x20) == 0) {
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+ t2 = get_cycles();
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+ delta = t2 - tsc;
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+ tsc = t2;
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+ if ((unsigned long) delta < tscmin)
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+ tscmin = (unsigned int) delta;
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+ if ((unsigned long) delta > tscmax)
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+ tscmax = (unsigned int) delta;
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+ pitcnt++;
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+ }
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+
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+ /*
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+ * Sanity checks:
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+ *
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+ * If we were not able to read the PIT more than 5000
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+ * times, then we have been hit by a massive SMI
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+ *
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+ * If the maximum is 10 times larger than the minimum,
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+ * then we got hit by an SMI as well.
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+ */
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+ if (pitcnt < 5000 || tscmax > 10 * tscmin)
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+ return ULONG_MAX;
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+
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+ /* Calculate the PIT value */
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+ delta = t2 - t1;
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+ do_div(delta, 50);
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+ return delta;
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+}
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+
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+
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/**
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* native_calibrate_tsc - calibrate the tsc on boot
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*/
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unsigned long native_calibrate_tsc(void)
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{
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- u64 tsc1, tsc2, tr1, tr2, tsc, delta, pm1, pm2, hpet1, hpet2;
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+ u64 tsc1, tsc2, delta, pm1, pm2, hpet1, hpet2;
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unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX;
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- unsigned long flags, tscmin, tscmax;
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- int hpet = is_hpet_enabled(), pitcnt, i;
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+ unsigned long flags;
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+ int hpet = is_hpet_enabled(), i;
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/*
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* Run 5 calibration loops to get the lowest frequency value
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@@ -157,72 +217,22 @@ unsigned long native_calibrate_tsc(void)
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* amount of time anyway.
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*/
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for (i = 0; i < 5; i++) {
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-
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- tscmin = ULONG_MAX;
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- tscmax = 0;
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- pitcnt = 0;
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-
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- local_irq_save(flags);
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+ unsigned long tsc_pit_khz;
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/*
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* Read the start value and the reference count of
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- * hpet/pmtimer when available:
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+ * hpet/pmtimer when available. Then do the PIT
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+ * calibration, which will take at least 50ms, and
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+ * read the end value.
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*/
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+ local_irq_save(flags);
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tsc1 = tsc_read_refs(&pm1, hpet ? &hpet1 : NULL);
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-
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- /* Set the Gate high, disable speaker */
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- outb((inb(0x61) & ~0x02) | 0x01, 0x61);
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-
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- /*
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- * Setup CTC channel 2* for mode 0, (interrupt on terminal
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- * count mode), binary count. Set the latch register to 50ms
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- * (LSB then MSB) to begin countdown.
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- *
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- * Some devices need a delay here.
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- */
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- outb(0xb0, 0x43);
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- outb((CLOCK_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
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- outb((CLOCK_TICK_RATE / (1000 / 50)) >> 8, 0x42);
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-
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- tsc = tr1 = tr2 = get_cycles();
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-
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- while ((inb(0x61) & 0x20) == 0) {
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- tr2 = get_cycles();
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- delta = tr2 - tsc;
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- tsc = tr2;
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- if ((unsigned int) delta < tscmin)
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- tscmin = (unsigned int) delta;
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- if ((unsigned int) delta > tscmax)
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- tscmax = (unsigned int) delta;
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- pitcnt++;
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- }
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-
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- /*
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- * We waited at least 50ms above. Now read
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- * pmtimer/hpet reference again
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- */
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+ tsc_pit_khz = pit_calibrate_tsc();
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tsc2 = tsc_read_refs(&pm2, hpet ? &hpet2 : NULL);
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-
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local_irq_restore(flags);
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- /*
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- * Sanity checks:
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- *
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- * If we were not able to read the PIT more than 5000
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- * times, then we have been hit by a massive SMI
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- *
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- * If the maximum is 10 times larger than the minimum,
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- * then we got hit by an SMI as well.
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- */
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- if (pitcnt > 5000 && tscmax < 10 * tscmin) {
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-
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- /* Calculate the PIT value */
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- delta = tr2 - tr1;
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- do_div(delta, 50);
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-
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- /* We take the smallest value into account */
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- tsc_pit_min = min(tsc_pit_min, (unsigned long) delta);
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- }
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+ /* Pick the lowest PIT TSC calibration so far */
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+ tsc_pit_min = min(tsc_pit_min, tsc_pit_khz);
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/* hpet or pmtimer available ? */
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if (!hpet && !pm1 && !pm2)
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