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@@ -535,6 +535,7 @@ static int s5pc110_dma_ops(void *dst, void *src, size_t count, int direction)
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{
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void __iomem *base = onenand->dma_addr;
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int status;
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+ unsigned long timeout;
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writel(src, base + S5PC110_DMA_SRC_ADDR);
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writel(dst, base + S5PC110_DMA_DST_ADDR);
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@@ -552,6 +553,13 @@ static int s5pc110_dma_ops(void *dst, void *src, size_t count, int direction)
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writel(S5PC110_DMA_TRANS_CMD_TR, base + S5PC110_DMA_TRANS_CMD);
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+ /*
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+ * There's no exact timeout values at Spec.
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+ * In real case it takes under 1 msec.
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+ * So 20 msecs are enough.
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+ */
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+ timeout = jiffies + msecs_to_jiffies(20);
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+
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do {
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status = readl(base + S5PC110_DMA_TRANS_STATUS);
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if (status & S5PC110_DMA_TRANS_STATUS_TE) {
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@@ -559,7 +567,8 @@ static int s5pc110_dma_ops(void *dst, void *src, size_t count, int direction)
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base + S5PC110_DMA_TRANS_CMD);
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return -EIO;
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}
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- } while (!(status & S5PC110_DMA_TRANS_STATUS_TD));
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+ } while (!(status & S5PC110_DMA_TRANS_STATUS_TD) &&
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+ time_before(jiffies, timeout));
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writel(S5PC110_DMA_TRANS_CMD_TDC, base + S5PC110_DMA_TRANS_CMD);
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