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@@ -944,7 +944,7 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs)
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struct perf_event *event = NULL;
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void *at, *top;
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u64 status = 0;
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- int bit, n;
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+ int bit;
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if (!x86_pmu.pebs_active)
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return;
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@@ -954,16 +954,16 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs)
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ds->pebs_index = ds->pebs_buffer_base;
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- n = (top - at) / x86_pmu.pebs_record_size;
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- if (n <= 0)
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+ if (unlikely(at > top))
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return;
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/*
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* Should not happen, we program the threshold at 1 and do not
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* set a reset value.
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*/
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- WARN_ONCE(n > x86_pmu.max_pebs_events,
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- "Unexpected number of pebs records %d\n", n);
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+ WARN_ONCE(top - at > x86_pmu.max_pebs_events * x86_pmu.pebs_record_size,
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+ "Unexpected number of pebs records %ld\n",
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+ (top - at) / x86_pmu.pebs_record_size);
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for (; at < top; at += x86_pmu.pebs_record_size) {
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struct pebs_record_nhm *p = at;
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